PIC18F97J60-I/PF Microchip Technology, PIC18F97J60-I/PF Datasheet - Page 178

• Manufacturer Part Number: PIC18F97J60-I/PF
• Description: IC PIC MCU FLASH 65KX16 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F97J60-I/PF

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 100-TQFP, 100-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver/Ethernet/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 5
• Operating Supply Voltage: 2.35 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183033
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Package: 100TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 41.667 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100DM163024 - BOARD DEMO PICDEM.NET 2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F97J60 FAMILY
14.1
Timer3 can operate in one of three modes:
• Timer
• Synchronous Counter
• Asynchronous Counter
FIGURE 14-1:
FIGURE 14-2:
DS39762B-page 176
T1OSO/T13CKI
Note 1: When enable bit, T1OSCEN, is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
Note 1: When enable bit, T1OSCEN, is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
T1OSO/T13CKI
Timer3 Operation
T1OSI
T1OSI
ECCPx Select from T3CON<6,3>
ECCPx Select from T3CON<6,3>
ECCPx Special Event Trigger
ECCPx Special Event Trigger
Timer1 Oscillator
Timer1 Oscillator
T1OSCEN
T3CKPS1:T3CKPS0
T3SYNC
TMR3ON
T1OSCEN
T3CKPS1:T3CKPS0
T3SYNC
TMR3ON
TIMER3 BLOCK DIAGRAM
TIMER3 BLOCK DIAGRAM (16-BIT READ/WRITE MODE)
(1)
(1)
TMR3CS
TMR3CS
F
Internal
Clock
Clock
Internal
F
OSC
OSC
/4
/4
Preliminary
1
0
1
0
Timer1 Clock Input
Clear TMR3
Timer1 Clock Input
Clear TMR3
Prescaler
1, 2, 4, 8
Prescaler
1, 2, 4, 8
The operating mode is determined by the clock select
bit, TMR3CS (T3CON<1>). When TMR3CS is cleared
(= 0), Timer3 increments on every internal instruction
cycle (F
on every rising edge of the Timer1 external clock input
or the Timer1 oscillator, if enabled.
As
RC0/T1OSO/T13CKI pins become inputs when the
Timer1 oscillator is enabled. This means the values of
TRISC<1:0> are ignored and the pins are read as ‘0’.
2
2
with
OSC
TMR3L
TMR3L
/4). When the bit is set, Timer3 increments
8
Timer1,
Synchronize
8
Sleep Input
Synchronize
Sleep Input
Detect
Detect
High Byte
High Byte
TMR3H
TMR3
8
TMR3
© 2006 Microchip Technology Inc.
8
the
8
1
0
1
0
Read TMR1L
Write TMR1L
Internal Data Bus
RC1/T1OSI
Set
TMR3IF
on Overflow
Set
TMR3IF
on Overflow
Timer3
On/Off
Timer3
On/Off
and