PIC18F97J60-I/PF Microchip Technology, PIC18F97J60-I/PF Datasheet - Page 188

• Manufacturer Part Number: PIC18F97J60-I/PF
• Description: IC PIC MCU FLASH 65KX16 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F97J60-I/PF

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 100-TQFP, 100-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver/Ethernet/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 5
• Operating Supply Voltage: 2.35 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183033
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Package: 100TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 41.667 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100DM163024 - BOARD DEMO PICDEM.NET 2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F97J60 FAMILY
16.4
In Pulse-Width Modulation (PWM) mode, the CCPx pin
produces up to a 10-bit resolution PWM output. Since
the CCP4 and CCP5 pins are multiplexed with a
PORTG data latch, the appropriate TRISG bit must be
cleared to make the CCP4 or CCP5 pin an output.
Figure 16-4 shows a simplified block diagram of the
CCPx module in PWM mode.
For a step-by-step procedure on how to set up a CCPx
module for PWM operation, see Section 16.4.3
“Setup for PWM Operation”.
FIGURE 16-4:
A PWM output (Figure 16-5) has a time base (period)
and a time that the output stays high (duty cycle).
The frequency of the PWM is the inverse of the
period (1/period).
FIGURE 16-5:
DS39762B-page 186
Note 1:
Note:
Latch
Duty Cycle
Reset
TMRx = PRx
Match
Set CCPx pin
TMR2 (TMR4) = PR2 (TMR4)
PWM Mode
The two LSbs of the Duty Cycle register are held by a
2-bit latch that is part of the module’s hardware. It is
physically separate from the CCPRx registers.
Duty Cycle Register
Clearing the CCP4CON or CCP5CON
register will force the RG3 or RG4 output
latch (depending on device configuration)
to the default low level. This is not the
PORTG I/O data latch.
Duty Cycle
9
Comparator
CCPRxH
CCPRxL
Comparator
TMRx
PRx
Period
TMR2 (TMR4) = Duty Cycle
SIMPLIFIED PWM BLOCK
DIAGRAM
PWM OUTPUT
(1)
0
TMR2 (TMR4) = PR2 (PR4)
CCPxCON<5:4>
2 LSbs Latched
From Q clocks
S
R
Q
Output Enable
TRIS
CCPx
pin
Preliminary
16.4.1
The PWM period is specified by writing to the PR2
(PR4) register. The PWM period can be calculated
using Equation 16-1:
EQUATION 16-1:
PWM frequency is defined as 1/[PWM period].
When TMR2 (TMR4) is equal to PR2 (PR4), the
following three events occur on the next increment
cycle:
• TMR2 (TMR4) is cleared
• The CCPx pin is set (exception: if PWM duty
• The PWM duty cycle is latched from CCPRxL into
16.4.2
The PWM duty cycle is specified by writing to the
CCPRxL register and to the CCPxCON<5:4> bits. Up
to 10-bit resolution is available. The CCPRxL contains
the eight MSbs and the CCPxCON<5:4> contains the
two LSbs. This 10-bit value is represented by
CCPRxL:CCPxCON<5:4>. Equation 16-2 is used to
calculate the PWM duty cycle in time.
EQUATION 16-2:
CCPRxL and CCPxCON<5:4> can be written to at any
time, but the duty cycle value is not latched into
CCPRxH until after a match between PR2 (PR4) and
TMR2 (TMR4) occurs (i.e., the period is complete). In
PWM mode, CCPRxH is a read-only register.
cycle = 0%, the CCPx pin will not be set)
CCPRxH
Note:
PWM Duty Cycle = (CCPR
PWM Period = [(PR2) + 1] • 4 • T
PWM PERIOD
The Timer2 and Timer4 postscalers (see
Section 13.0
Section 15.0 “Timer4 Module”) are not
used in the determination of the PWM
frequency. The postscaler could be used
to have a servo update rate at a different
frequency than the PWM output.
PWM DUTY CYCLE
T
OSC
(TMR2 Prescale Value)
© 2006 Microchip Technology Inc.
• (TMRx Prescale Value)
“Timer2
X
L:CCP
X
CON<5:4>) •
Module”
OSC
•
and