PIC18F97J60-I/PF Microchip Technology, PIC18F97J60-I/PF Datasheet - Page 202

• Manufacturer Part Number: PIC18F97J60-I/PF
• Description: IC PIC MCU FLASH 65KX16 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F97J60-I/PF

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 100-TQFP, 100-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver/Ethernet/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 5
• Operating Supply Voltage: 2.35 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183033
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Package: 100TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 41.667 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100DM163024 - BOARD DEMO PICDEM.NET 2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F97J60 FAMILY
17.4.6
In half-bridge applications, where all power switches
are modulated at the PWM frequency at all times, the
power switches normally require more time to turn off
than to turn on. If both the upper and lower power
switches are switched at the same time (one turned on
and the other turned off), both switches may be on for
a short period of time until one switch completely turns
off. During this brief interval, a very high current
( shoot-through current ) may flow through both power
switches, shorting the bridge supply. To avoid this
potentially destructive shoot-through current from flow-
ing during switching, turning on either of the power
switches is normally delayed to allow the other switch
to completely turn off.
In the Half-Bridge Output mode, a digitally program-
mable dead-band delay is available to avoid
shoot-through current from destroying the bridge
power switches. The delay occurs at the signal
transition from the non-active state to the active state.
See Figure 17-4 for illustration. The lower seven bits of
the ECCP1DEL register (Register 17-2) set the delay
period in terms of microcontroller instruction cycles
(T
17.4.7
When the ECCP1 is programmed for any of the
Enhanced PWM modes, the active output pins may be
configured for auto-shutdown. Auto-shutdown immedi-
ately places the Enhanced PWM output pins into a
defined shutdown state when a shutdown event
occurs.
REGISTER 17-2:
DS39762B-page 200
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-0
CY
P1RSEN
R/W-0
or 4 T
OSC
PROGRAMMABLE DEAD-BAND
DELAY
ENHANCED PWM
AUTO-SHUTDOWN
).
P1RSEN: PWM Restart Enable bit
1 = Upon auto-shutdown, the ECCP1ASE bit clears automatically once the shutdown event goes
0 = Upon auto-shutdown, ECCP1ASE must be cleared in software to restart the PWM
P1DC6:P1DC0: PWM Delay Count bits
Delay time, in number of F
PWM signal to transition to active.
P1DC6
R/W-0
away; the PWM restarts automatically
ECCP1DEL: ECCP1 DEAD-BAND DELAY REGISTER
W = Writable bit
‘1’ = Bit is set
P1DC5
R/W-0
OSC
/4 (4 * T
P1DC4
R/W-0
Preliminary
OSC
) cycles, between the scheduled time and actual time for a
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
P1DC3
R/W-0
signal on the FLT0 pin can also trigger a shutdown. The
A shutdown event can be caused by either of the two
comparator modules or the FLT0 pin (or any combina-
tion of these three sources). The comparators may be
used to monitor a voltage input proportional to a current
being monitored in the bridge circuit. If the voltage
exceeds a threshold, the comparator switches state and
triggers a shutdown. Alternatively, a low-level digital
auto-shutdown feature can be disabled by not selecting
any auto-shutdown sources. The auto-shutdown
sources
ECCP1AS2:ECCP1AS0 bits (ECCP1AS<6:4>).
When a shutdown occurs, the output pins are
asynchronously placed in their shutdown states,
specified
PSS1BD1:PSS1BD0 bits (ECCP1AS<3:0>). Each pin
pair (P1A/P1C and P1B/P1D) may be set to drive high,
drive low or be tri-stated (not driving). The ECCP1ASE
bit (ECCP1AS<7>) is also set to hold the Enhanced
PWM outputs in their shutdown states.
The ECCP1ASE bit is set by hardware when a shutdown
event occurs. If automatic restarts are not enabled, the
ECCP1ASE bit is cleared by firmware when the cause of
the shutdown clears. If automatic restarts are enabled,
the ECC1PASE bit is automatically cleared when the
cause of the auto-shutdown has cleared.
If the ECCP1ASE bit is set when a PWM period begins,
the PWM outputs remain in their shutdown state for that
entire PWM period. When the ECCP1ASE bit is cleared,
the PWM outputs will return to normal operation at the
beginning of the next PWM period.
Note:
to
Writing to the ECCP1ASE bit is disabled
while a shutdown condition is active.
by
P1DC2
R/W-0
be
the
used
© 2006 Microchip Technology Inc.
PSS1AC1:PSS1AC0
x = Bit is unknown
are
P1DC1
R/W-0
selected
using
P1DC0
R/W-0
bit 0
and
the