PIC18F97J60-I/PF Microchip Technology, PIC18F97J60-I/PF Datasheet - Page 34

• Manufacturer Part Number: PIC18F97J60-I/PF
• Description: IC PIC MCU FLASH 65KX16 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F97J60-I/PF

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 100-TQFP, 100-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver/Ethernet/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 5
• Operating Supply Voltage: 2.35 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183033
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Package: 100TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 41.667 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100DM163024 - BOARD DEMO PICDEM.NET 2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F97J60 FAMILY
TABLE 1-6:
DS39762B-page 32
RD0/AD0/PSP0
RD1/AD1/PSP1
RD2/AD2/PSP2
RD3/AD3/PSP3
RD4/AD4/PSP4/SDO2
RD5/AD5/PSP5/
SDI2/SDA2
RD6/AD6/PSP6/
SCK2/SCL2
RD7/AD7/PSP7/SS2
Legend:
Note 1:
RD0
AD0
PSP0
RD1
AD1
PSP1
RD2
AD2
PSP2
RD3
AD3
PSP3
RD4
AD4
PSP4
SDO2
RD5
AD5
PSP5
SDI2
SDA2
RD6
AD6
PSP6
SCK2
SCL2
RD7
AD7
PSP7
SS2
2:
3:
4:
5:
Pin Name
TTL = TTL compatible input
ST
I
P
Alternate assignment for ECCP2/P2A when CCP2MX Configuration bit is cleared (Extended Microcontroller mode).
Default assignment for ECCP2/P2A for all devices in all operating modes (CCP2MX Configuration bit is set).
Default assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is set).
Alternate assignment for ECCP2/P2A when CCP2MX Configuration bit is cleared (Microcontroller mode).
Alternate assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is cleared).
= Schmitt Trigger input with CMOS levels
= Input
= Power
PIC18F96J60/96J65/97J60 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
TQFP
92
91
90
89
88
87
84
83
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
I
I
Buffer
Type
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
Preliminary
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
—
PORTD is a bidirectional I/O port.
Digital I/O.
External memory address/data 0.
Parallel Slave Port data.
Digital I/O.
External memory address/data 1.
Parallel Slave Port data.
Digital I/O.
External memory address/data 2.
Parallel Slave Port data.
Digital I/O.
External memory address/data 3.
Parallel Slave Port data.
Digital I/O.
External memory address/data 4.
Parallel Slave Port data.
SPI data out.
Digital I/O.
External memory address/data 5.
Parallel Slave Port data.
SPI data in.
I
Digital I/O.
External memory address/data 6.
Parallel Slave Port data.
Synchronous serial clock input/output for SPI mode.
Synchronous serial clock input/output for I
Digital I/O.
External memory address/data 7.
Parallel Slave Port data.
SPI slave select input.
2
C™ data I/O.
CMOS
Analog
O
OD
= CMOS compatible input or output
= Analog input
= Output
= Open-Drain (no P diode to V
Description
© 2006 Microchip Technology Inc.
2
C mode.
DD
)