PIC18F97J60-I/PF Microchip Technology, PIC18F97J60-I/PF Datasheet - Page 461

• Manufacturer Part Number: PIC18F97J60-I/PF
• Description: IC PIC MCU FLASH 65KX16 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F97J60-I/PF

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 100-TQFP, 100-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver/Ethernet/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 5
• Operating Supply Voltage: 2.35 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183033
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Package: 100TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 41.667 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100DM163024 - BOARD DEMO PICDEM.NET 2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

INCF ................................................................................. 378
INCFSZ ............................................................................ 379
In-Circuit Debugger .......................................................... 356
In-Circuit Serial Programming (ICSP) ...................... 343, 356
Indexed Literal Offset Addressing
Indexed Literal Offset Mode ................................. 91, 93, 404
Indirect Addressing ............................................................ 89
INFSNZ ............................................................................ 379
Initialization Conditions for All Registers ...................... 59–65
Instruction Cycle ................................................................ 74
Instruction Set .................................................................. 357
© 2006 Microchip Technology Inc.
Master Mode ............................................................ 282
Multi-Master Communication, Bus Collision
Multi-Master Mode ................................................... 292
Operation ................................................................. 268
Read/Write Bit Information (R/W Bit) ............... 268, 270
Registers .................................................................. 263
Serial Clock (SCKx/SCLx) ....................................... 270
Slave Mode .............................................................. 268
Sleep Operation ....................................................... 292
Stop Condition Timing .............................................. 291
and Standard PIC18 Instructions ............................. 404
BSR ............................................................................ 93
Clocking Scheme ....................................................... 74
Flow/Pipelining ........................................................... 74
ADDLW .................................................................... 363
ADDWF .................................................................... 363
ADDWF (Indexed Literal Offset Mode) .................... 405
ADDWFC ................................................................. 364
ANDLW .................................................................... 364
ANDWF .................................................................... 365
BC ............................................................................ 365
BCF .......................................................................... 366
BN ............................................................................ 366
BNC ......................................................................... 367
BNN ......................................................................... 367
BNOV ....................................................................... 368
BNZ .......................................................................... 368
BOV ......................................................................... 371
BRA .......................................................................... 369
BSF .......................................................................... 369
BSF (Indexed Literal Offset Mode) .......................... 405
BTFSC ..................................................................... 370
BTFSS ..................................................................... 370
BTG .......................................................................... 371
BZ ............................................................................ 372
CALL ........................................................................ 372
CLRF ........................................................................ 373
CLRWDT .................................................................. 373
COMF ...................................................................... 374
CPFSEQ .................................................................. 374
Baud Rate Generator ....................................... 284
Operation ......................................................... 283
Reception ......................................................... 288
Repeated Start Condition Timing ..................... 287
Start Condition Timing ..................................... 286
Transmission ................................................... 288
and Arbitration ................................................. 292
Address Masking ............................................. 269
Addressing ....................................................... 268
Reception ......................................................... 270
Transmission ................................................... 270
Preliminary
PIC18F97J60 FAMILY
INTCON Register
INTCON Registers ........................................................... 121
Inter-Integrated Circuit. See I
Internal Oscillator Block ..................................................... 41
Internal RC Oscillator
Internal Voltage Regulator Specifications ........................ 424
Internet Address .............................................................. 467
CPFSGT .................................................................. 375
CPFSLT ................................................................... 375
DAW ........................................................................ 376
DCFSNZ .................................................................. 377
DECF ....................................................................... 376
DECFSZ .................................................................. 377
Extended Instructions .............................................. 399
General Format ....................................................... 359
GOTO ...................................................................... 378
INCF ........................................................................ 378
INCFSZ .................................................................... 379
INFSNZ .................................................................... 379
IORLW ..................................................................... 380
IORWF ..................................................................... 380
LFSR ....................................................................... 381
MOVF ...................................................................... 381
MOVFF .................................................................... 382
MOVLB .................................................................... 382
MOVLW ................................................................... 383
MOVWF ................................................................... 383
MULLW .................................................................... 384
MULWF ................................................................... 384
NEGF ....................................................................... 385
NOP ......................................................................... 385
POP ......................................................................... 386
PUSH ....................................................................... 386
RCALL ..................................................................... 387
RESET ..................................................................... 387
RETFIE .................................................................... 388
RETLW .................................................................... 388
RETURN .................................................................. 389
RLCF ....................................................................... 389
RLNCF ..................................................................... 390
RRCF ....................................................................... 390
RRNCF .................................................................... 391
SETF ....................................................................... 391
SETF (Indexed Literal Offset Mode) ........................ 405
SLEEP ..................................................................... 392
Standard Instructions ............................................... 357
SUBFWB ................................................................. 392
SUBLW .................................................................... 393
SUBWF .................................................................... 393
SUBWFB ................................................................. 394
SWAPF .................................................................... 394
TBLRD ..................................................................... 395
TBLWT .................................................................... 396
TSTFSZ ................................................................... 397
XORLW ................................................................... 397
XORWF ................................................................... 398
RBIF Bit ................................................................... 138
Use with WDT .......................................................... 351
Considerations when Enabling ........................ 404
Syntax ............................................................. 399
Use with MPLAB IDE Tools ............................. 406
2
C Mode.
DS39762B-page 459