PIC18F97J60-I/PF Microchip Technology, PIC18F97J60-I/PF Datasheet - Page 63

• Manufacturer Part Number: PIC18F97J60-I/PF
• Description: IC PIC MCU FLASH 65KX16 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F97J60-I/PF

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 100-TQFP, 100-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver/Ethernet/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 5
• Operating Supply Voltage: 2.35 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183033
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Package: 100TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 41.667 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100DM163024 - BOARD DEMO PICDEM.NET 2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 4-2:
© 2006 Microchip Technology Inc.
T3CON
PSPCON
SPBRG1
RCREG1
TXREG1
TXSTA1
RCSTA1
EECON2
EECON1
IPR3
PIR3
PIE3
IPR2
PIR2
PIE2
IPR1
PIR1
PIE1
MEMCON
OSCTUNE
TRISJ
TRISH
TRISG
TRISF
TRISE
TRISD
TRISC
TRISB
TRISA
LATJ
LATH
Legend:
Note 1:
Register
2:
3:
4:
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with
the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack.
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector
(0008h or 0018h).
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
See Table 4-1 for Reset value for specific condition.
PIC18F6XJ6X
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INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Applicable Devices
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Preliminary
Brown-out Reset
Power-on Reset,
PIC18F97J60 FAMILY
0000 0000
0000 ----
0000 0000
0000 0000
xxxx xxxx
0000 0010
0000 000x
---- ----
---0 x00-
1111 1111
0000 0000
0000 0000
1111 1-11
0000 0-00
0000 0-00
1111 1111
0000 0000
0000 0000
0-00 --00
0000 ----
--11 ----
1111 1111
1111 1111
---1 ----
---1 1111
1111 1111
1111 111-
1111 1111
--11 1111
1111 1111
---- -111
1111 1111
1111 1111
1111 1111
--11 1111
--xx ----
xxxx xxxx
xxxx xxxx
RESET Instruction,
Stack Resets,
MCLR Reset,
WDT Reset,
uuuu uuuu
0000 ----
0000 0000
0000 0000
uuuu uuuu
0000 0010
0000 000x
---- ----
---0 x00-
1111 1111
0000 0000
0000 0000
1111 1-11
0000 0-00
0000 0-00
1111 1111
0000 0000
0000 0000
0-00 --00
0000 ----
--11 ----
1111 1111
1111 1111
---1 ----
---1 1111
1111 1111
1111 111-
1111 1111
--11 1111
1111 1111
---- -111
1111 1111
1111 1111
1111 1111
--11 1111
--uu ----
uuuu uuuu
uuuu uuuu
CM Reset
DS39762B-page 61
Wake-up via WDT
or Interrupt
uuuu uuuu
uuuu ----
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- ----
---u uuu-
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu u-uu
uuuu u-uu
uuuu u-uu
uuuu uuuu
uuuu uuuu
uuuu uuuu
u-uu --uu
uuuu ----
--uu ----
uuuu uuuu
uuuu uuuu
---u ----
---u uuuu
uuuu uuuu
uuuu uuu-
uuuu uuuu
--uu uuuu
uuuu uuuu
---- -uuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
--uu ----
uuuu uuuu
uuuu uuuu
(3)
(3)
(3)