PIC18F97J60-I/PF Microchip Technology, PIC18F97J60-I/PF Datasheet - Page 206

• Manufacturer Part Number: PIC18F97J60-I/PF
• Description: IC PIC MCU FLASH 65KX16 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F97J60-I/PF

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 100-TQFP, 100-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver/Ethernet/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 5
• Operating Supply Voltage: 2.35 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183033
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Package: 100TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 41.667 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100DM163024 - BOARD DEMO PICDEM.NET 2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F97J60 FAMILY
TABLE 17-5:
DS39762B-page 204
INTCON
RCON
PIR1
PIE1
IPR1
PIR2
PIE2
IPR2
PIR3
PIE3
IPR3
TRISB
TRISC
TRISD
TRISE
TRISG
TRISH
TMR1L
TMR1H
T1CON
TMR2
T2CON
PR2
TMR3L
TMR3H
T3CON
TMR4
T4CON
PR4
CCPRxL
CCPRxH
CCPxCON
ECCPxAS
ECCPxDEL
Legend:
Note 1:
Name
(1)
(2)
2:
3:
(3)
(3)
(3)
(3)
(3)
— = unimplemented, read as ‘0’, r = reserved. Shaded cells are not used during ECCPx operation.
Applicable to 64-pin devices only.
Registers and/or specific bits are unimplemented on 64-pin devices.
Generic term for all of the identical registers of this name for all Enhanced CCPx modules, where ‘x’ identifies the individual
module (ECCP1, ECCP2 or ECCP3). Bit assignments and Reset values for all registers of the same generic name are
identical.
Timer1 Register Low Byte
Timer1 Register High Byte
Timer2 Register
Timer2 Period Register
Timer3 Register Low Byte
Timer3 Register High Byte
Timer4 Register
Timer4 Period Register
Capture/Compare/PWM Register x Low Byte
Capture/Compare/PWM Register x High Byte
ECCP
GIE/GIEH
TRISE7
PxRSEN
OSCFIF
OSCFIE
OSCFIP
TRISG7
SSP2IF
SSP2IE
SSP2IP
TRISB7
TRISC7
TRISD7
TRISH7
PSPIF
PSPIE
PSPIP
RD16
RD16
PxM1
IPEN
Bit 7
REGISTERS ASSOCIATED WITH ECCPx MODULES AND TIMER1 TO TIMER4
—
—
X
ASE ECCP
(2)
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0
T4OUTPS3 T4OUTPS2 T4OUTPS1 T4OUTPS0
PEIE/GIEL
TRISE6
T3CCP2
TRISG6
TRISB6
TRISC6
TRISD6
TRISH6
BCL2IF
BCL2IE
BCL2IP
T1RUN
PxDC6
PxM0
CMIF
CMIE
CMIP
ADIF
ADIE
ADIP
Bit 6
—
X
AS2 ECCP
(2)
T1CKPS1
T3CKPS1
TMR0IE
TRISB5
TRISC5
TRISD5
TRISE5
TRISG5
TRISH5
PxDC5
DCxB1
RC1IF
RC1IE
RC1IP
ETHIF
ETHIE
ETHIP
RC2IF
RC2IE
RC2IP
Bit 5
CM
X
AS1 ECCP
Preliminary
T1CKPS0
T3CKPS0
TRISC4
TRISD4
TRISG4
TRISH4
TRISB4
TRISE4
INT0IE
DCxB0
PxDC4
TX1IF
TX1IE
TX1IP
TX2IF
TX2IE
TX2IP
Bit 4
RI
r
r
r
X
AS0
T1OSCEN
TRISG3
PSS
CCPxM3
T3CCP1
TMR4IE
TMR4IP
TMR4IF
TRISC3
TRISD3
TRISH3
SSP1IF
SSP1IE
SSP1IP
BCL1IF
BCL1IE
BCL1IP
TRISB3
TRISE3
PxDC3
RBIE
Bit 3
TO
X
AC1
(2)
PSS
TMR2ON
TMR4ON
CCPxM2
T1SYNC
T3SYNC
TMR0IF
CCP1IF
CCP1IE
CCP1IP
CCP5IF
CCP5IE
CCP5IP
TRISB2
TRISC2
TRISD2
TRISG2
TRISH2
TRISE2
PxDC2
Bit 2
PD
—
—
—
X
AC0
T2CKPS1
T4CKPS1
PSS
TMR1CS
TMR3CS
CCPxM1
© 2006 Microchip Technology Inc.
TMR2IE
TMR2IP
TMR2IF
TMR3IF
TMR3IE
TMR3IP
CCP4IF
CCP4IE
CCP4IP
TRISC1
TRISD1
TRISG1
TRISH1
TRISB1
TRISE1
INT0IF
PxDC1
Bit 1
POR
X
BD1
TRISG0
PSS
T2CKPS0
T4CKPS0
TMR1ON
TMR3ON
CCPxM0
TMR1IF
TMR1IE
TMR1IP
CCP2IF
CCP2IE
CCP2IP
CCP3IF
CCP3IE
CCP3IP
TRISC0
TRISD0
TRISH0
TRISB0
TRISE0
PxDC0
RBIF
BOR
Bit 0
X
BD0
(2)
on Page:
Values
Reset
60, 63
59
60
61
61
61
61
61
61
61
61
61
61
61
61
61
61
61
60
60
60
60
60
60
60
60
61
62
62
62
60
60
60
63