EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 106

• Manufacturer Part Number: EP3SE50F780I3N
• Description: Stratix III
• Manufacturer: Altera

Simplified DSP Operation
Figure 5–3. Four-Multiplier Adder and Accumulation Capability
5–6
Stratix III Device Handbook, Volume 1
Input
Data
144
Half-DSP Block
To support commonly found FIR-like structures efficiently, a major
addition to the DSP block in Stratix III is the ability to propagate the result
of one Half-Block to the next Half-Block completely within the DSP block
without additional soft logic overhead. This is achieved by the inclusion
of a dedicated addition unit and routing that adds the 44-bit result of a
previous Half-Block with the 44-bit result of the current block. The 44-bit
result is either fed to the next Half-Block or out of the DSP block via the
output register stage. This is shown in
described in later sections.
The combination of a fast, low-latency Four-Multiplier Adder unit and
the “chained cascade” capability of the output chaining adder provides
an optimal FIR and vector multiplication capability.
Figure
5–4. Detailed examples are
Altera Corporation
44
October 2007
Result