EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 518

no-image

EP3SE50F780I3N

Manufacturer Part Number
EP3SE50F780I3N
Description
Stratix III
Manufacturer
Altera
Datasheets

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP3SE50F780I3N
Manufacturer:
ALTERA
Quantity:
540
Part Number:
EP3SE50F780I3N
Manufacturer:
ALTERA
0
Part Number:
EP3SE50F780I3N
Manufacturer:
ALTERA
Quantity:
200
Part Number:
EP3SE50F780I3N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Part Number:
EP3SE50F780I3N
0
Electrical Characteristics
1–6
Stratix III Device Handbook, Volume 2
Notes to
(1)
(2)
I
I
25-Ω R
50-Ω R
I
OZ
Table 1–5. Stratix III I/O Pin Leakage Current
Table 1–6. Stratix III On-Chip Termination Calibration Accuracy Specifications (Part 1 of 2)
Symbol
50-Ω R
50-Ω R
50-Ω R
50-Ω R
50-Ω R
50-Ω R
50-Ω R
This value is specified for normal device operation. The value may vary during power-up. This applies for all
V
10
observed when the diode is on.
Symbol
CCIO
μ
S
S
A I/O leakage current limit is applicable when the internal clamping diode is off. A higher current can be the
Table
3.3/3.0/2.5 Internal series termination with
3.3/3.0/2.5 Internal series termination with
settings (3.3, 3.0, 2.5, 1.8, 1.5 and 1.2 V).
S
S
S
S
T
T
T
2.5
1.8
1.5
1.8
1.8
1.5
1.2
Input Pin Leakage Current
Tri-stated I/O Pin Leakage Current
1–5:
calibration (25-Ω setting)
calibration (50-Ω setting)
Internal parallel termination with
calibration (50-Ω setting)
Internal series termination with
calibration (25-Ω setting)
Internal series termination with
calibration (50-Ω setting)
Internal parallel termination with
calibration (50-Ω setting)
Internal series termination with
calibration (50-Ω setting)
Internal parallel termination with
calibration (50-Ω setting)
Internal series termination with
calibration (50-Ω setting)
Parameter
I/O Pin Leakage Current
Table 1–5
On-Chip Termination (OCT) Specifications
If OCT calibration is enabled, calibration is automatically performed at
power-up for I/Os connected to the calibration block.
Stratix III OCT calibration block accuracy specifications.
Description
defines Stratix III I/O Pin leakage current specifications.
Note
V
V
(1),
O
I
= V
= V
Conditions
(2)
CCIOMAX
CCIOMAX
V
V
V
V
V
V
V
V
V
CCIO
CCIO
CCIO
CCIO
CCIO
CCIO
CCIO
CCIO
CCIO
to 0 V
to 0 V
Conditions
= 3.3/3.0/2.5 V
= 3.3/3.0/2.5 V
= 2.5 V
= 1.8 V
= 1.8 V
= 1.8 V
= 1.5 V
= 1.5 V
= 1.2 V
Min
-10
-10
Commercial Industrial
Typ
Calibration Accuracy
Table 1–6
±10
±10
±10
Altera Corporation
±5
±5
±5
±5
±8
±8
November 2007
Note (1)
Max
10
10
lists the
- Preliminary
Unit
μA
μA
Unit
%
%
%
%
%
%
%
%
%

Related parts for EP3SE50F780I3N