EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 27

• Manufacturer Part Number: EP3SE50F780I3N
• Description: Stratix III
• Manufacturer: Altera

Altera Corporation
November 2007
f
f
For more information, refer to the
Devices
I/O Banks and I/O Structure
Stratix III devices contain up to 24 modular I/O banks, each of which
contains 24, 32, 36, 40 or 48 I/Os. This modular bank structure improves
pin efficiency and eases device migration. The left and right side I/O
banks contain circuitry to support external memory interfaces at speeds
up to 333 MHz and high-speed differential I/O interfaces meeting up
to 1.25 Gbps performance. The top and bottom I/O banks contain
circuitry to support external memory interfaces at speeds up to 400 MHz,
high-speed differential inputs and outputs running at speeds up
to 800 MHz and 500 MHz respectively.
Stratix III devices support a wide range of industry I/O standards,
including single-ended, voltage referenced single-ended, and differential
I/O standards. The Stratix III I/O supports programmable bus hold,
programmable pull-up resistor, programmable slew rate, programmable
output delay control, and open-drain output. Stratix III devices also
support on-chip series (R
auto calibration for single-ended I/O standards and on-chip differential
termination (R
Dynamic OCT is also supported on bi-directional I/O pins in all I/O
banks.
For more information, refer to the
volume 1 of the Stratix III Device Handbook.
External Memory Interfaces
The Stratix III I/O structure has been completely redesigned from the
ground up to provide flexibility and enable high-performance support
for existing and emerging external memory standards such as DDR,
DDR2, DDR3, QDRII, QDRII+ and RLDRAMII at frequencies of up to 400
MHz.
Packed with features such as dynamic on-chip termination, trace
mismatch compensation, read/write levelling, half-rate registers, 4- to
36-bit programmable DQ group widths, Stratix III I/O's supply the built
in functionality required for rapid and robust implementation of external
memory interfaces. Double data-rate support is found on all sides of the
Stratix III device. Stratix III devices provide an efficient architecture to
quickly and easily fit wide external memory interfaces exactly where you
want them.
chapter in volume 1 of the Stratix III Device Handbook.
D
) for LVDS I/O standards on Left/Right I/O banks.
S
) and on-chip parallel (R
Stratix III Device I/O Features
Clock Networks and PLLs in Stratix III
Stratix III Device Handbook, Volume 1
Stratix III Device Family Overview
T
) termination with
chapter in
1–9