EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 61

• Manufacturer Part Number: EP3SE50F780I3N
• Description: Stratix III
• Manufacturer: Altera

Column
Interconnects
Altera Corporation
October 2007
R20 row interconnects span 20 LABs and provide the fastest resource for
row connections between distant LABs, TriMatrix memory, DSP blocks,
and row IOEs. R20 row interconnects drive LAB local interconnects via
R4 and C4 interconnects. R20 interconnects can drive R20, R4, C12, and
C4 interconnects.
The column interconnect operates similarly to the row interconnect. It
vertically routes signals to and from LABs, TriMatrix memory, DSP
blocks, and IOEs. Each column of LABs is served by a dedicated column
interconnect. These column interconnect resources include:
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Stratix III devices include an enhanced interconnect structure in LABs for
routing-shared arithmetic chains and carry chains for efficient arithmetic
functions. The register chain connection allows the register output of one
ALM to connect directly to the register input of the next ALM in the LAB
for fast shift registers. These ALM-to-ALM connections bypass the local
interconnect. The Quartus II Compiler automatically takes advantage of
these resources to improve utilization and performance.
shows the shared arithmetic chain, carry chain, and register chain
interconnects.
Shared arithmetic chain interconnects in a LAB and from LAB to
LAB
Carry chain interconnects in a LAB and from LAB to LAB
Register chain interconnects in a LAB
C4 interconnects traversing a distance of four blocks in the same
device column
C12 column interconnects for high-speed vertical routing through
the device
MultiTrack Interconnect in Stratix III Devices
Stratix III Device Handbook, Volume 1
Figure 3–2
3–3