EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 271

• Manufacturer Part Number: EP3SE50F780I3N
• Description: Stratix III
• Manufacturer: Altera

Introduction
Altera Corporation
November 2007
SIII51008-1.3
The Stratix
ground up to provide flexible and high-performance support for
existing and emerging external memory standards. These include
high-performance double data rate (DDR) memory standards such as
DDR3, DDR2, DDR SDRAM, QDRII+, QDRII SRAM, and RLDRAM II at
frequencies of up to 400 MHz.
Packed with features such as dynamic on-chip termination (OCT), trace
mismatch compensation, read/write leveling, half data rate (HDR)
blocks, and 4- to 36-bit programmable DQ group widths, Stratix III I/O
elements provide easy-to-use built-in functionality required for a rapid
and robust implementation.
Double data rate external memory support is found on all sides of the
Stratix III FPGA. Stratix III devices provide an efficient architecture to
quickly and easily fit wide external memory interfaces with the new small
modular I/O bank structure.
A self-calibrating megafunction (ALTMEMPHY) is optimized to take
advantage of the Stratix III I/O structure, and along with the new
Quartus
completes the picture by providing the total solution for the highest
reliable frequency of operation across process, voltage, and temperature
(PVT) variations.
®
II timing analysis tool, TimeQuest Timing Analyzer, which
®
III I/O structure has been completely redesigned from the
Interfaces in Stratix III
8. External Memory
Devices
8–1