EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 529

• Manufacturer Part Number: EP3SE50F780I3N
• Description: Stratix III
• Manufacturer: Altera

Altera Corporation
November 2007
Note to
(1)
(2)
Double mode
MLAB
M9K
Table 1–19. Stratix III DSP Block Performance Specifications (Part 2 of
Table 1–20. Stratix III TriMatrix Memory Block Performance Specifications (Part 1 of 2)
Block Type
Memory
Maximum is for fully pipelined block with Round and Saturation disabled.
Maximum for non-pipelined block with loopback input registers disabled and Round and Saturation disabled.
Table
Mode
1–19:
Single port
64×10
Simple
dual-port
32x20 single
clock
Simple
dual-port
64x10 single
clock
Single-port
256×36
Simple
dual-port
256×36 single
clock
True dual port
512×18 single
clock
Mode
TriMatrix Memory Block Specifications
Table 1–20
specifications.
Multipliers
Number of
ALUTs
0
0
0
0
0
0
1
TriMatrix
Memory
describes the Stratix III TriMatrix Memory Block
V
1
1
1
1
1
1
Stratix III Device Datasheet: DC and Switching Characteristics
-2 Speed
C C L
Grade
440
= 1.1V V
V
C C L
-2 Speed
Grade
600
600
600
600
600
600
= 1.1V V
-3 Speed
C C L
Grade
365
= 1.1V
C C L
-3 Speed
Grade
500
500
500
500
500
500
= 1.1V
Stratix III Device Handbook, Volume 2
V
C C L
-4 Speed
Grade
2)Note (1)
335
= 1.1V
V
C C L
-4 Speed
Grade
450
450
450
450
450
450
= 1.1V
(Part 2 of 2)
V
C C L
335
V
= 1.1V V
C C L
-4L Speed
450
450
450
450
450
450
= 1.1V V
Grade
-4L Speed
Grade
C C L
1–17
270
C C L
= 0.9V
Preliminary
375
375
375
325
325
325
Preliminary
= 0.9V
MHz
Unit
MHz
MHz
MHz
MHz
MHz
MHz
Unit