EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 214

• Manufacturer Part Number: EP3SE50F780I3N
• Description: Stratix III
• Manufacturer: Altera

Conclusion
Conclusion
Referenced
Documents
6–64
Stratix III Device Handbook, Volume 1
f
After phasedone goes from low to high, you can perform another
dynamic phase shift.
For details on the altpll_reconfig Megawizard Plug-In Manager, refer to
the
Spread-Spectrum Tracking
Stratix III devices can accept a spread-spectrum input with typical
modulation frequencies. However, the device cannot automatically
detect that the input is a spread-spectrum signal. Instead, the input signal
looks like deterministic jitter at the input of PLL. Stratix III PLLs can track
a spread-spectrum input clock as long as it is within the input-jitter
tolerance specifications. Stratix III devices cannot internally generate
spread-spectrum clocks.
PLL Specifications
1
Stratix III device PLLs provide you with complete control of device clocks
and system timing. The ability to reconfigure the PLL counter clock
frequency and phase shift in real time can be especially useful in
prototyping environments, allowing you to sweep PLL output
frequencies and adjust the output-clock phase-shift dynamically. These
PLLs are also capable of offering flexible system-level clock management
that was previously only available in discrete PLL devices. Stratix III
PLLs meet and exceed the features offered by these high-end discrete
devices, reducing the need for other timing devices in the system.
This chapter references the following documents:
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altpll_reconfig Megafunction User
altpll Megafunction User Guide
altpll_reconfig Megafunction User Guide
DC and Switching Characteristics of Stratix III Devices
Stratix III Device I/O Features
Refer to the
chapter in volume 2 of the Stratix III Device Handbook for
information on PLL timing specifications.
DC and Switching Characteristics of Stratix III Devices
Guide.
Altera Corporation
November 2007