EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 418

• Manufacturer Part Number: EP3SE50F780I3N
• Description: Stratix III
• Manufacturer: Altera

Device Configuration Pins
11–58
Stratix III Device Handbook, Volume 1
CLKUSR
INIT_DONE
DEV_OE
DEV_CLRn
Table 11–15. Optional Configuration Pins
Pin Name
N/A if option is on.
I/O if option is off.
N/A if option is on.
I/O if option is off.
N/A if option is on.
I/O if option is off.
N/A if option is on.
I/O if option is off.
User Mode
Table 11–15
configuration pins are not enabled in the Quartus II software, they are
available as general-purpose user I/O pins. Therefore, during
configuration, these pins function as user I/O pins and are tri-stated with
weak pull-up resistors.
Table 11–16
stable before and during configuration to prevent accidental loading of
JTAG instructions. The TDI, TMS, and TRST have weak internal pull-up
resistors while TCK has a weak internal pull-down resistor (typically
Output open-drain Use the
Pin Type
describes the optional configuration pins. If these optional
describes the dedicated JTAG pins. JTAG pins must be kept
Input
Input
Input
Optional user-supplied clock input synchronizes the
initialization of one or more devices. Enable this pin
by turning on the Enable user-supplied start-up
clock (CLKUSR) option in the Quartus II software.
initialized and is in user mode. When
and during the beginning of configuration, the
INIT_DONE
an external 10-kΩ pull-up resistor. Once the option
bit to enable
device (during the first frame of configuration data),
the
complete, the
high and the device enters user mode. Thus, the
monitoring circuitry must be able to detect a
low-to-high transition. This pin is enabled by turning
on the Enable INIT_DONE output option in the
Quartus II software.
Optional pin that allows you to override all tri-states
on the device. When this pin is driven low, all I/O pins
are tri-stated, when this pin is driven high, all I/O pins
behave as programmed. Enable this pin by turning on
the Enable device-wide output enable (DEV_OE)
option in the Quartus II software.
Optional pin that allows you to override all clears on
all device registers. When this pin is driven low, all
registers are cleared. When this pin is driven high, all
registers behave as programmed. This pin is enabled
by turning on the Enable device-wide reset
(DEV_CLRn) option in the Quartus II software.
INIT_DONE
Status
INIT_DONE
pin is tri-stated and pulled high due to
INIT_DONE
pin will go low. When initialization is
pin to indicate when the device has
Description
is programmed into the
pin is released and pulled
Altera Corporation
nCONFIG
November 2007
is low