EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 903

• Manufacturer Part Number: EP3SE50F780I3N
• Description: Stratix III
• Manufacturer: Altera

Altera Corporation
November 2007
Table 1–206. Glossary Table
Letter
W
U
V
T
t
TCCS (channel-
to-channel-
skew)
t
t
t
t
t
t
V
V
V
V
V
V
V
V
V
V
V
V
V
W
C
D U T Y
FA L L
IN C C J
O U T P J _ I O
O U T P J _ D C
R I S E
C M ( D C )
I C M
I D
D I F ( A C )
D I F ( D C )
I H
I H ( A C )
I H ( D C )
I L
I L ( A C )
I L ( D C )
O C M
O D
Subject
—
High-speed receiver/transmitter input and output clock period.
The timing difference between the fastest and the slowest output edges, including
t
included in the TCCS measurement (refer to the Timing Diagram figure under S in
this table)
HIGH-SPEED I/O Block: Duty cycle on high-speed transmitter output clock.
Timing Unit Interval (TUI)
The timing budget allowed for skew, propagation delays, and data sampling window.
(TUI = 1/(Receiver Input Clock Frequency Multiplication Factor) = t
Signal High-to-low transition time (80-20%)
Cycle-to-cycle jitter tolerance on PLL clock input
Period jitter on general purpose I/O driven by a PLL
Period jitter on dedicated clock output driven by a PLL
Signal Low-to-high transition time (20-80%)
DC Common Mode Input Voltage.
Input Common Mode Voltage: The common mode of the differential signal at the
receiver.
Input differential Voltage Swing: The difference in voltage between the positive and
complementary conductors of a differential transmission at the receiver.
AC differential Input Voltage: Minimum AC input differential voltage required for
switching.
DC differential Input Voltage: Minimum DC input differential voltage required for
switching.
Voltage Input High: The minimum positive voltage applied to the input which will be
accepted by the device as a logic high.
High-level AC input voltage
High-level DC input voltage
Voltage Input Low: The maximum positive voltage applied to the input which will be
accepted by the device as a logic low.
Low-level AC input voltage
Low-level DC input voltage
Output Common Mode Voltage: The common mode of the differential signal at the
transmitter.
Output differential Voltage Swing: The difference in voltage between the positive and
complementary conductors of a differential transmission at the transmitter.
HIGH-SPEED I/O BLOCK: Clock Boost Factor
CO
variation and clock skew, across channels driven by the same PLL. The clock is
Stratix III Device Datasheet: DC and Switching Characteristics
Definitions
—
Stratix III Device Handbook, Volume 2
C
/w)
1–391