EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 88

• Manufacturer Part Number: EP3SE50F780I3N
• Description: Stratix III
• Manufacturer: Altera

Memory Modes
Figure 4–10. Stratix III Simple Dual-Port Timing Waveforms
Figure 4–11. Stratix III Mixed-Port Read-During-Write Timing Waveforms
4–14
Stratix III Device Handbook, Volume 1
q (asynch)
q (asynch)
wraddress
wraddress
rdaddress
rdaddress
wrclock
wrclock
rdclock
rdclock
wren
data
wren
data
rden
rden
doutn-1
doutn-1
din-1
din-1
an-1
an-1
bn
bn
an
an
din
din
Figure 4–10
simple dual-port mode with unregistered outputs. Registering the RAM's
outputs would simply delay the q output by one clock cycle.
Figure 4–11
mixed-port mode with unregistered outputs.
doutn
doutn
b0
b0
a0
a0
shows timing waveforms for read and write operations in
shows timing waveforms for read and write operations in
a1
a1
dout0
dout0
a2
b1
a2
b1
a3
a3
din4
din4
b2
b2
a4
a4
Altera Corporation
din5
din5
November 2007
a5
a5
b3
b3
a6
a6
din6
din6