EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 483

• Manufacturer Part Number: EP3SE50F780I3N
• Description: Stratix III
• Manufacturer: Altera

Figure 15–2. Error Detection Block Diagram
Altera Corporation
October 2007
Pre-Calculated CRC from configuration bit stream
Error Injection Block
Injection Register
Fault Injection
JTAG Fault
Error Detection
State Machine
Register
■
1
Error Detection Registers
There is one set of 16-bit registers in the error detection circuitry that store
the computed CRC signature. A non-zero value on the syndrome register
causes the CRC_ERROR pin to be set high.
diagram of the error detection circuitry, the syndrome registers, and the
error injection block.
The second type is the 16-bit CRC that is embedded in every
configuration data frame.
●
●
Control Signals
During configuration, after a frame of data is loaded into the
Stratix III device, the precomputed CRC is shifted into the CRC
circuitry.
At the same time, the CRC value for the data frame shifted-in is
calculated. If the precomputed CRC and calculated CRC values
do not match, then nSTATUS is set low. Every data frame has a
16-bit CRC; therefore, there are many 16-bit CRC values for the
whole configuration bitstream. Every device has different
lengths of the configuration data frame.
The
16-bit CRC only when the device is in user mode.
JTAG Update
JTAG Shift
“Error Detection Block”
Register
Register
Calculation and Error
Error Message
16-Bit CRC
Search Engine
Register
46
User Update
User Shift
Register
Register
Stratix III Device Handbook, Volume 1
section focuses on the first type, the
16
SEU Mitigation in Stratix III Devices
Figure 15–2
General Routings
Syndrome
Register
16
shows the block
CRC_ERROR
15–9