EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 664

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EP3SE50F780I3N

Manufacturer Part Number
EP3SE50F780I3N
Description
Stratix III
Manufacturer
Altera
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I/O Timing
1–152
Stratix III Device Handbook, Volume 2
1.5-V HSTL CLASS II
1.2-V HSTL CLASS I
1.2-V HSTL CLASS II
3.0-V PCI
3.0-V PCI-X
3.3-V LVTTL
Table 1–75. EP3SL150 Column Pins Input Timing Parameters (Part 4 of 4)
Table 1–76. EP3SL150 Row Pins Input Timing Parameters (Part 1 of 4)
I/O Standard
I/O Standard
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
Clock
Clock
PLL
PLL
PLL
PLL
PLL
PLL
Table 1–76
single-ended I/O standards.
Parameter
Parameter
t
t
t
t
t
t
t
t
t
t
t
t
SU
t
SU
t
SU
SU
t
SU
SU
t
SU
SU
t
SU
t
SU
t
SU
t
SU
t
H
H
H
H
H
H
H
H
H
specifies EP3SL150 Row Pins Input Timing parameters for
Industrial Commercial
Industrial Commercial
Fast Model
Fast Model
-0.945
-0.410
-0.794
-0.489
-0.787
-0.496
-0.787
-0.496
-0.957
-0.330
-0.957
-0.330
1.047
0.512
0.601
0.608
0.608
1.065
0.438
1.065
0.438
-1.298 -1.372 -1.464 -1.418 -1.766
-0.840 -0.988 -1.074 -1.007 -0.982
-1.058 -1.124 -1.230 -1.173 -1.525
-1.016 -1.194 -1.317 -1.260 -1.173
-1.043 -1.108 -1.214 -1.157 -1.509
-1.030 -1.210 -1.333 -1.276 -1.189
-1.043 -1.108 -1.214 -1.157 -1.509
-1.030 -1.210 -1.333 -1.276 -1.189
-1.388 -1.508 -1.621 -1.562 -1.910
-0.691 -0.816 -0.934 -0.878 -0.795
-1.388 -1.508 -1.621 -1.562 -1.910
-0.691 -0.816 -0.934 -0.878 -0.795
V
1.441
0.983
1.163
1.178
1.178
1.530
0.833
1.530
0.833
V
1.1V
1.1V
CCL
CCL
-2
-2
=
=
V
1.534
1.150
V
1.361
1.377
1.377
1.669
0.977
1.669
0.977
1.1V
1.1V
CCL
CCL
-3
-3
=
=
Altera Corporation
1.643
1.253
V
V
1.500
1.516
1.516
1.796
1.109
1.796
1.109
1.1V
1.1V
CCL
CCL
-4
-4
November 2007
=
=
V
1.587
1.176
1.434
1.450
1.450
1.729
1.045
1.729
1.045
V
1.1V
1.1V
CCL
CCL
=
=
-4L
-4L
V
1.928
1.144
V
1.341
1.357
1.357
2.071
0.956
2.071
0.956
0.9V
0.9V
CCL
CCL
=
=
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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