HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 106

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Rev. 1.00, 02/04, page 68 of 804
Instruction
LDC.L
LDC.L
LDS
LDS
LDS
LDS.L
LDS.L
LDS.L
NOP
PREF
RTE
SETS
SETT
SLEEP
STC
STC
STC
STC
STC
STC
STC
STC
STC
STC
STC
STC
STC
STC.L
STC.L
STC.L
@Rm+,
R6_BANK
@Rm+,
R7_BANK
Rm,MACH
Rm,MACL
Rm,PR
@Rm+,MACH
@Rm+,MACL
@Rm+,PR
@Rm
SR,Rn
GBR,Rn
VBR,Rn
SSR, Rn
SPC,Rn
R0_BANK,Rn
R1_BANK,Rn
R2_BANK,Rn
R3_BANK,Rn
R4_BANK,Rn
R5_BANK,Rn
R6_BANK,Rn
R7_BANK,Rn
SR,@–Rn
GBR,@–Rn
VBR,@–Rn
Instruction Code Operation
0100mmmm11100111
0100mmmm11110111
0100mmmm00001010
0100mmmm00011010
0100mmmm00101010
0100mmmm00000110
0100mmmm00010110
0100mmmm00100110
0000000000001001
0000mmmm10000011
0000000000101011
0000000001011000
0000000000011000
0000000000011011
0000nnnn00000010
0000nnnn00010010
0000nnnn00100010
0000nnnn00110010
0000nnnn01000010
0000nnnn10000010
0000nnnn10010010
0000nnnn10100010
0000nnnn10110010
0000nnnn11000010
0000nnnn11010010
0000nnnn11100010
0000nnnn11110010
0100nnnn00000011
0100nnnn00010011
0100nnnn00100011
(Rm)→R6_BANK, Rm+4→Rm √
(Rm)→R7_BANK, Rm+4→Rm √
Rm→MACH
Rm→MACL
Rm→PR
(Rm)→MACH, Rm+4→Rm
(Rm)→MACL, Rm+4→Rm
(Rm)→PR, Rm+4→Rm
No operation
(Rm) → cache
Delayed branch, SSR → SR,
branch to SPC
1→S
1→T
Sleep
SR→Rn
GBR→Rn
VBR→Rn
SSR→Rn
SPC→Rn
R0_BANK→Rn
R1_BANK→Rn
R2_BANK→Rn
R3_BANK→Rn
R4_BANK→Rn
R5_BANK→Rn
R6_BANK→Rn
R7_BANK→Rn
Rn–4→Rn, SR→(Rn)
Rn–4→Rn, GBR→(Rn)
Rn–4→Rn, VBR→(Rn)
Privileged
Mode








√


√
√

√
√
√
√
√
√
√
√
√
√
√
√

√
Cycles
4
4
1
1
1
1
1
1
1
1
5
1
1
4*
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
T Bit












1
















