HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 217

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

5.2
The cache has the following registers. For details on register addresses and register access size,
refer to section 27, List of Registers.
• Cache control register 1 (CCR1)
• Cache control register 2 (CCR2)
5.2.1
The cache is enabled or disabled using the CE bit in CCR1. CCR1 also has a CF bit (which
invalidates all cache entries), and WT and CB bits (which select either write-through mode or
write-back mode). Programs that change the contents of the CCR1 register should be placed in
address space that is not cached.
Bit
31 to 4
3
2
1
0
Register Descriptions
Cache Control Register 1 (CCR1)
Bit Name
—
CF
CB
WT
CE
Initial
Value
All 0
0
0
0
0
R/W
R
R/W
R/W
R/W
R/W
Cache Enable
Description
Reserved
These bits are always read as 0. The write value
should always be 0. If 1 is written to these bits,
correct operation cannot be guaranteed.
Cache Flush
Writing 1 flushes all cache entries (clears the V, U,
and LRU bits of all cache entries to 0). This bit is
always read as 0. Write-back to external memory is
not performed when the cache is flushed.
Write-Back
Indicates the cache’s operating mode for space P1.
0: Write-through mode
1: Write-back mode
Write-Through
Indicates the cache’s operating mode for spaces P0,
U0, and P3.
0: Write-back mode
1: Write-through mode
Indicates whether the cache function is used.
0: The cache function is not used.
1: The cache function is used.
Rev. 1.00, 02/04, page 179 of 804