HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 17

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 19 USB Host Controller (USBH) .........................................................509
19.1 Features............................................................................................................................. 509
19.2 Input/Output Pins .............................................................................................................. 510
19.3 Register Descriptions ........................................................................................................ 511
19.4 Data Storage Format of USB Host Controller .................................................................. 546
19.5 Usage Restrictions of USB Host Controller...................................................................... 546
Section 20 USB Function Controller (USBF) ...................................................547
20.1 Features............................................................................................................................. 547
20.2 Input/Output Pins .............................................................................................................. 549
20.3 Register Descriptions ........................................................................................................ 550
19.3.1 HcRevision Register (HREVR) ........................................................................... 512
19.3.2 HcControl Register (HCTLR).............................................................................. 513
19.3.3 HcCommandStatus Register (HCSR) .................................................................. 516
19.3.4 HcInterruptStatus Register (HISR) ...................................................................... 518
19.3.5 HcInterruptEnable Register (HIER)..................................................................... 521
19.3.6 HcInterruptDisable Register (HIDR) ................................................................... 524
19.3.7 HcHCCA Register (HHCCAR) ........................................................................... 526
19.3.8 HcPeriodCurrentED Register (HPCEDR) ........................................................... 527
19.3.9 HcControlHeadED Register (HCHEDR)............................................................. 527
19.3.10 HcControlCurrentED Register (HCCEDR) ......................................................... 527
19.3.11 HcBulkHeadED Register (HBHEDR) ................................................................. 528
19.3.12 HcBulkCurrentED Register (HBCEDR).............................................................. 528
19.3.13 HcDoneHeadED Register (HDHEDR) ................................................................ 528
19.3.14 HcFmInterval Register (HFIR) ............................................................................ 529
19.3.15 HcFmRemaining Register (HFRR)...................................................................... 531
19.3.16 HcFmNumber Register (HFNR).......................................................................... 532
19.3.17 HcPeriodicStart Register (HPSR) ........................................................................ 533
19.3.18 HcLSThreshold Register (HLSTR) ..................................................................... 534
19.3.19 HcRhDescriptorA Register (HRDRA)................................................................. 535
19.3.20 HcRhDescriptorB Register (HRDRB) ................................................................. 537
19.3.21 HcRhStatus Register (HRSR) .............................................................................. 538
19.3.22 HcRhPortStatus Register (HRPSR) ..................................................................... 540
19.4.1 Storage Format of Transferred Data .................................................................... 546
19.4.2 Storage Format of Descriptor............................................................................... 546
19.5.1 Restriction of Reset Control................................................................................. 546
20.3.1 Interrupt Flag Register 0 (IFR0) .......................................................................... 551
20.3.2 Interrupt Select Register 0 (ISR0)........................................................................ 558
20.3.3 Interrupt Enable Register 0 (IER0) ...................................................................... 563
20.3.4 EP0i Data Register (EPDR0i).............................................................................. 566
20.3.5 EP0o Data Register (EPDR0o) ............................................................................ 567
20.3.6 EP0s Data Register (EPDR0s) ............................................................................. 567
Rev. 1.00, 02/04, page xvii of xxxviii