HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 442

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

15.3.11 Transmit Data Assign Register (SITDAR)
SITDAR is a 16-bit readable/writable register that specifies the position of the transmit data in a
frame (slot number).
Rev. 1.00, 02/04, page 404 of 804
Bit
2
1
0
Bit
15
14 to 12
11
10
9
8
Bit Name
BRDV2
BRDV1
BRDV0
Bit Name
TDLE
—
TDLA3
TDLA2
TDLA1
TDLA0
Initial
Value
0
0
0
Initial
Value
0
All 0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
Description
Baud Rate Generator’s Division Ratio Setting
Set the frequency division ratio for the output stage of the
baud rate generator.
000: Prescaler output × 1/2
001: Prescaler output × 1/4
010: Prescaler output × 1/8
011: Prescaler output × 1/16
100: Prescaler output × 1/32
101: Setting prohibited
110: Setting prohibited
111: Prescaler output × 1/1*
The final frequency division ratio of the baud rate
generator is determined by BRPS × BRDV (maximum
1/1024).
Note: * This setting is valid only when the BRPS4 to
Description
Transmit Left-Channel Data Enable
0: Disables left-channel data transmission
1: Enables left-channel data transmission
Reserved
These bits are always read as 0. The write value should
always be 0. If 1 is written to these bits, the operation is
not guaranteed.
Transmit Left-Channel Data Assigns 3 to 0
Specify the position of left-channel data in a transmit
frame as B'0000 (0) to B'1110 (14).
1111: Setting prohibited
•
Transmit data for the left channel is specified in the
SITDL bit in SITDR.
BRPS0 bits are set to B'00000.