HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 62

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Rev. 1.00, 02/04, page 24 of 804
Classification
Bus control
Direct memory
access controller
(DMAC)
Serial I/O with
FIFO
(SIOF)
Symbol
WE0
CAS
RAS
CKE
DQM1
DQM0
REFOUT
WAIT
DREQ
DACK
TEND
SIOF_TXD
(MOSI)
SIOF_RXD
(MISO)
SIOF_SCK
(SCK)
SIOF_MCLK
SIOF_SYNC
(SIOF_SS0)
SIOF_SS1
SIOF_SS2
I/O
Output
Output
Output
Output
Output
Output
Output
Input
Input
Output
Output
Output
Input
I/O
Input
I/O
Output
Output
Name
Write lower bits Indicates that bits 7 to 0 of the data
Data enable
Data enable
Clock enable
DQ mask
Bus release
request
Wait
request
request
acceptance
DMA transfer
end
Transmit data
Receive data
Serial clock
Master clock
Frame
synchronization
signal
(slave device 0
select)
Slave device 1
select
Slave device 2
select
DQ mask
DMA transfer
DMA transfer
Clock enable signal pin of SDRAM
Indicates that bits 7 to 0 of the data
Inserts a wait cycle into the bus
Transmit data pin
Receive data pin
Clock I/O pin
Master clock input pin
Function
in the external memory or device
are being written.
CAS signal of SDRAM
RAS signal of SDRAM
Indicates that bits 15 to 8 of the
data in SDRAM are selected.
in SDRAM are selected.
Indicates that a refresh request has
occurred during bus mastership
release.
cycles during access to the
external space.
Input pin for an external DMA
transfer request
Output pin for external DMA
transfer request acceptance
Indicates that DMA transfer ends.
Frame synchronization signal pin
(In SPI mode, selects the slave
device 0.)
In SPI mode, selects the slave
device 1.
In SPI mode, selects the slave
device 2.