HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 174

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Table 3.30 Variation of Rounding Operation
• Overflow Protection
3.5.11
The S bit in SR is used as the overflow protection enable bit. The S bit is effective for any
arithmetic operations executed in the DSP unit, including the CPU instruction multiply and MAC
operations. The arithmetic operation overflows when the operation result exceeds the range of
two’s complement representation without guard-bit parts. Table 3.31 shows the definition of
overflow protection for fixed-point arithmetic operations, including fixed-point multiplication
described in section 3.5.7, Fixed-Point Multiply Operation. Table 3.32 shows the definition of
overflow protection for integer arithmetic operations. The lower word of the saturation value of
the integer arithmetic operation is don’t care. Lower word value cannot be guaranteed.
When the overflow protection is effective, overflow never occurs. So, the V bit is cleared, and the
DC bit is also cleared when the overflow mode is selected by the CS[2:0] bits.
Table 3.31 Definition of Overflow Protection for Fixed-Point Arithmetic Operations
Rev. 1.00, 02/04, page 136 of 804
Mnemonic
PRND
Sign
Positive
Negative
The S bit in SR is effective for any rounding operations in the DSP unit. See section 3.5.11,
Overflow Protection, for details.
Overflow Protection
Function
Rounding
Overflow Condition
Result > 1 – 2
Result < –1
Figure 3.21 Definition of Rounding Operation
–31
H'00 0003
H'00 0002
H'00 0001
Rounded result
Source 1
Sx

Fixed Value
1 – 2
–1
–31
Analog value
Source 2

Sy
True value
Hex Representation
00 7FFF FFFF
FF 8000 0000
Destination
Dz
Dz