HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 77

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

2.3.2
The system registers which are the following two registers can be accessed by the LDS or STS
instructions. Figure 2.8 shows the system register configuration.
Multiply and Accumulate Registers: The multiply and accumulate registers store the results of
multiplication and accumulation instructions or multiplication instructions. These registers also
store additional values for the multiplication and accumulation instructions. After a reset, these
registers are undefined.
The multiply and accumulate registers consist of the multiply and accumulate high register
(MACH) which stores the upper 32 bits and multiply and accumulate low register (MACL) which
stores lower 32 bits.
Procedure Register: The procedure register (PR) stores the return address for a subroutine call
using the BSR, BSRF, or JSR instruction. The return address stored in PR is restored to the
program counter (PC) by the RTS (return from the subroutine) instruction. After a reset, this
register is undefined.
System Registers
31
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
R15
*1,*2
*2
*2
*2
*2
*2
*2
*2
Figure 2.7 General Registers
0
General Registers: Undefined after reset
Notes: 1. R0 functions as an index register in the indexed
2. R0 to R7 are banked registers.
In privileged mode, either R0_BANK0 to
R7_BANK0 or R0_BANK1 to R7_BANK1
is selected by the RB bit in SR.
register-indirect addressing mode and indexed
GBR-indirect addressing mode. In some
instructions, only R0 can be used as the source
or destination register.
Rev. 1.00, 02/04, page 39 of 804