HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 37

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Table 20.4
Table 20.5
Table 20.6
Table 20.7
Section 21 Bluetooth Interface (BT)
Table 21.1
Table 21.2
Section 22 D/A Converter (DAC)
Table 22.1
Section 23 I/O Ports
Table 23.1
Table 23.2
Table 23.3
Table 23.4
Table 23.5
Table 23.6
Section 24 Pin Function Controller (PFC)
Table 24.1
Section 25 User Break Controller
Table 25.1
Table 25.2
Table 25.3
Section 26 User Debugging Interface (H-UDI)
Table 26.1
Table 26.2
Table 26.3
Table 26.4
Section 28 Electrical Characteristics
Table 28.1
Table 28.2
Table 28.2
Table 28.2
Table 28.2
Table 28.3
Table 28.4
Table 28.5
Table 28.6
Table 28.7
Table 28.8
Table 28.9
Example of Setting of Endpoint Configuration Information (1)........................... 583
Example of Endpoint Configuration (2) ............................................................... 584
Example of Setting of Endpoint Configuration Information (2)........................... 585
Command Decoding on Application Side............................................................. 601
Input/Output Pins.................................................................................................. 613
Settings and Functions .......................................................................................... 618
Pin Configuration.................................................................................................. 624
Port A Data Register (PADR) Read/Write Operations ......................................... 628
Port B Data Register (PBDR) Read/Write Operations.......................................... 630
Port D Data Register (PDDR) Read/Write Operations ......................................... 632
Port E Data Register (PEDR) Read/Write Operations .......................................... 634
Port G Data Register (PGDR) Read/Write Operations ......................................... 636
Port H Data Register (PHDR) Read/Write Operations ......................................... 638
Multiplex Pins....................................................................................................... 639
Specifying Break Address Register ...................................................................... 660
Specifying Break Data Register............................................................................ 662
Data Access Cycle Addresses and Operand Size Comparison Conditions ........... 673
Pin Configuration.................................................................................................. 684
JTAG Commands ................................................................................................. 686
Correspondence between Pins of SH7660 and Boundary Scan Register.............. 687
Reset Configuration .............................................................................................. 693
Absolute Maximum Ratings ................................................................................. 729
DC Characteristics (1) Common Items ................................................................. 731
DC Characteristics (2-a) Except DAC and USB Related Pins.............................. 732
DC Characteristics (2-b) USB Related Pins*........................................................ 733
DC Characteristics (2-c) USB Transceiver Related Pins* .................................... 734
Permissible Output Current Values....................................................................... 734
Operating Frequencies .......................................................................................... 735
Clock Timing ........................................................................................................ 736
Control Signal Timing .......................................................................................... 740
Bus Timing ........................................................................................................... 743
Peripheral Module Signal Timing......................................................................... 776
SIOF Module Signal Timing ................................................................................ 777
Rev. 1.00, 02/04, page xxxvii of xxxviii