HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 80

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HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Rev. 1.00, 02/04, page 42 of 804
Bit
31
30
29
28
27 to 10
Bit Name
MD
RB
BL
Initial
Value R/W Description
0
1
1
1
All 0
R
R/W Processing Mode
R/W Register Bank
R/W Block
R
Reserved
This bit is always read as 0. The write value should always
be 0. When 1 is written to this bit, operation cannot be
guaranteed.
Indicates the CPU processing mode.
0: User mode
1: Privileged mode
The MD bit is set to 1 after a reset or in an exception
handling state.
The general registers R0 to R7 are banked registers. The
RB bit selects a bank used in privileged mode.
0: Selects bank 0 registers. In this case, R0_BANK0 to
R7_BANK0 and R8 to R15 are used as general registers.
R0_BANK1 to R7_BANK1 can be accessed by the LDC or
STC instruction.
1: Selects bank 1 registers. In this case, R0_BANK1 to
R7_BANK1 and R8 to R15 are used as general registers.
R0_BANK0 to R7_BANK0 can be accessed by the LDC or
STC instruction.
The RB bit is set to 1 after a reset or in an exception handling
state.
0: Enables an interrupt or user break.
1: Disables an interrupt or user break.
The BL bit is set to 1 after a reset or in an exception handling
state.
Reserved*
These bits are always read as 0. The write value should
always be 0. When 1 is written to these bits, operation
cannot be guaranteed.
2

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