HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 558

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HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Rev. 1.00, 02/04, page 520 of 804
Bit
3
2
1
0
Bit Name
RD
SF
WDH
SO
Initial
Value
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
Resume Detected
This bit is set when the host controller detects that the
USB device outputs a resume signal. This bit is not set
when the host controller driver sets the USB Resume
state.
0: The resume signal is not detected.
1: The resume signal is detected.
Start of Frame
This bit is set by the host controller when each frame
starts and after HccaFrameNumber is updated. The host
controller simultaneously generates the SOF token.
0: Each frame has not initiated or HccaFrameNumber is
1: Initiation of each frame and updating of
Write back Done Head
This bit is set immediately after the host controller has
written HcDoneHead to HccaDoneHead. HccaDoneHead
is not updated until this bit is cleared. The host controller
driver should clear this bit only after the content of
HccaDoneHead has been stored.
0: When cleared after set to 1.
1: When HcDoneHead is written to HccaDoneHead.
Scheduling Overrun
This bit is set when the USB schedule has overrun after
HccaFrameNumber has updated in the current frame.
SchedulingOverrun also increments the SOC0 and SOC1
bits in the HcCommandStatus register.
0: The USB schedule has not overrun.
1: The USB schedule has overrun.
not updated.
HccaFrameNumber

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