HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 463

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HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Regarding Transmit and Receive Classification: The transmit sources and receive sources are
signals indicating the state; after being set, if the state changes, they are automatically cleared by
the SIOF.
When the DMA transfer is used, a DMA transfer request is pulled low (0 level) for one cycle at
the end of DMA transfer.
Processing when Errors Occur: On occurrence of each of the errors indicated as a status in
SISTR, the SIOF performs the following operations.
• Transmit FIFO underflow (TFUDF)
• Transmit FIFO overflow (TFOVF)
• Receive FIFO overflow (RFOVF)
• Receive FIFO underflow (RFUDF)
• FS error (FSERR)
• Slot assign error (SAERR)
The immediately preceding transmit data is again transmitted.
The contents of the transmit FIFO are protected, and the write operation causing the overflow
is ignored.
Data causing the overflow is discarded and lost.
An undefined value is output on the bus.
The internal counter is reset according to the FSYN signal in which an error occurs.
 If the same slot is assigned to both serial data and control data, the slot is assigned to serial
 If the same slot is assigned to two control data items, data cannot be transferred correctly.
data.
Rev. 1.00, 02/04, page 425 of 804

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