HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 578

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

19.3.22 HcRhPortStatus Register (HRPSR)
HRPSR is used for base-controlling each port and to report the port event. The lower word is used
to reflect the port status while the upper word reflects the status change. Some status bits have
special writing (see below). If the transaction (token that passes the hand shake) is in progress
while a write to ChangePortStatus occurs, the resultant port status change must be postponed until
the completion of the transaction. Always write reserved bits to 0.
Rev. 1.00, 02/04, page 540 of 804
Bit
31 to 21 —
20
19
18
Bit Name
PRSC
OCIC
PSSC
Initial
Value
All 0
0
0
0
R/W
R
R/W
R/W
R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0. The operation is not guaranteed if 1 is
written to these bits.
This bit is set when the 10 ms port reset signal has
completed. Writing 1 by the host controller driver clears
this bit. When this bit is written to 0, this bit is not cleared.
0: Port reset is not completed.
1: Port reset is completed.
Port Over Current Indicator Change
This bit is valid when an overcurrent condition is reported
on the base of each port. This bit is set when the root hub
changes the POCI bit. Writing 1 by the host controller
driver clears this bit. When this bit is written to 0, this bit is
not cleared.
0: Port Over Current Indicator has not changed.
1: Port Over Current Indicator has changed.
Port Suspend Status Change
This bit is set when all resume sequences have
completed. These sequences include 20 ms resume
pulse, LS EOP, and 3 ms resychronization delay. Writing
1 by the host controller driver clears this bit. When this bit
is written to 0, this bit is not cleared. When the PRSC bit
is set, this bit is cleared.
0: Resume sequence has not completed.
1: Resume sequence has completed.
Port Reset Status Change