HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 636

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HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
EP3i has two 64-byte FIFOs in maximum, but the user can perform data transmission and write
transmit data without being aware of this dual-FIFO configuration. (In figure 20.15, FIFO sides A
and B are used for description.)
In isochronous transfer, transfer is occurred only once per one frame (1 ms). So, when SOF is
received, the FIFO buffer is switched automatically with hardware (the FIFO buffer is switched
automatically at a cycle of 1 ms by hardware if the SOF marker function is enabled even in the
case that SOF cannot be received by error).
FIFO buffers are switched over by the SOF reception. Therefore, the FIFO buffer in which the
USB function module transmits the data to the host and the FIFO buffer in which the firmware
writes the transmit data have different buffers, and a read and write of FIFO buffer are not
competed. Accordingly, the data written by the firmware is the data to be transmitted in one frame
after. The buffers of FIFOs are switched over automatically by the SOF reception, so a write of
data must be completed within the frame.
The USB function module transmits data to the host and set the TS internal flag to 1 when data to
be transmitted to the host exists in FIFO after an in-token is received. If there is no data in the
FIFO buffer, set the TR internal flag to 1 and transmit 0-byte data to the host. The internal flag
(TR, TS) information is automatically modified as IFR0 flag information (TR, TS) that can be
read by the SOF reception from the firmware.
In firmware, first, the processing routine of the isochronous transfer is called by SOF interrupt to
check the time stamp. Then one packet data is written to FIFO. This written data is transmitted to
the host in the next frame. Whether the previous frame has been transmitted normally or not can
be determined by reading the IFR0 flag information (TR, TS).
Rev. 1.00, 02/04, page 598 of 804

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