HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 132

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HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Table 3.8
By executing the LDRC instruction, the CPU performs the extended repeat control function. To
indicate that the CPU is being in extended repeat control, bit 0 of the RE register is set to 1 by
executing the LDRC instruction. To change the RE register value by a process such as an
exception handling, bit 0 of the RE register must be saved and restored correctly. By saving and
restoring the RC[11:0] bits, DSP bit, and RF[1:0] bits of the SR register, RE register, and RS
register correctly, a control is returned to the extended repeat function correctly after processing
such as exception handling.
Rev. 1.00, 02/04, page 94 of 804
Instruction
LDRS @(disp,PC)
LDRE @(disp,PC)
LDRC #imm
LDRC Rm
Extended Repeat Control Instructions
Operation
Calculates (disp × 2 + PC) and stores the result to the
RS register
Calculates (disp × 2 + PC) and stores the result to the
RE register
Sets 8-bit immediate data imm to the RC[11:0] bits of
the SR register and sets the information related to the
number of repetitions to the RF[1:0] bits of the SR.
RC[11:0] can be specified as 0 to 255.
During extended repeat control, bit 0 of the RE register
is set to 1.
Sets the[11:0] bits of the Rm register to the RC[11:0]
bits of the SR register and sets the information related
to the number of repetitions to the RF[1:0] bits of the
SR. RC[11:0] can be specified as 0 to 4095.
During extended repeat control, bit 0 of the RE register
is set to 1.
Number of
Execution States
1
1
1
1

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