HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 90

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HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Note: For addressing modes with displacement (disp) as shown below, the assembler description
Rev. 1.00, 02/04, page 52 of 804
Addressing
Mode
PC-relative
Immediate
in this manual indicates the value before it is scaled (x 1, x 2, or x 4) according to the
operand size to clarify the LSI operation. For details on actual assembler description, refer
to the description rules in each assembler.
@ (disp:4, Rn) ; Register indirect with displacement
@ (disp:8, GBR)
@ (disp:8, PC) ; PC relative with displacement
disp:8, disp:12 ; PC relative
Instruction
Format
disp:12
Rn
#imm:8
#imm:8
#imm:8
Effective Address Calculation Method
Effective address is register PC with 12-bit
displacement disp added after being sign-
extended and multiplied by 2.
Effective address is sum of register PC and Rn
contents.
8-bit immediate data imm of TST, AND, OR,
or XOR instruction is zero-extended.
8-bit immediate data imm of MOV, ADD, or
CMP/EQ instruction is sign-extended.
8-bit immediate data imm of TRAPA instruction
is zero-extended and multiplied by 4.
(sign-extended)
disp
Rn
PC
PC
2
; GBR indirect with displacement
×
+
+
PC + disp × 2
PC + Rn
Calculation
Formula
PC + disp × 2
PC + Rn

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