HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 281

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HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Bit
10
9
8
7 to 5
4
3
Bit Name
RMODE
PDOWN
BACTV
A3ROW1
A3ROW0
Initial
Value
0
0
0
All 0
0
0
R/W Description
R/W Refresh Control
R/W Power-Down Mode
R/W Bank Active Mode
R
R/W
R/W
Specifies whether to perform auto-refresh or self-refresh
when the RFSH bit is 1. When the RFSH bit is 1 and this bit
is 1, self-refresh starts immediately. When the RFSH bit is 1
and this bit is 0, auto-refresh starts according to the contents
that are set in registers RTCSR, RTCNT, and RTCOR.
0: Auto-refresh is performed
1: Self-refresh is performed
Specifies whether the SDRAM is entered in power-down
mode or not after the memory access other than SDRAM is
completed. If this bit is set to 1, the CKE pin is pulled to low
to place the SDRAM to power-down mode triggered by
memory access other than SDRAM after the SDRAM access
ends.
0: Does not place the SDRAM in power-down mode.
1: Places the SDRAM in power-down mode.
Specifies to access whether in auto-precharge mode (using
READA and WRITA commands) or in bank active mode
(using READ and WRIT commands).
0: Auto-precharge mode (using READA and WRITA
1: Bank active mode (using READ and WRIT commands)
Note: When bank active mode is specified, the data bus
width should be set 16 bits.
Reserved
These bits are always read as 0. The write value should
always be 0. If 1 is written to this bit, correct operation cannot
be guaranteed.
Number of Bits of Row Address
Specify the number of bits of the row address.
00: 11 bits
01: 12 bits
10: 13 bits
11: Reserved (setting prohibited)
commands)
Rev. 1.00, 02/04, page 243 of 804

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