HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 554

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

19.3.3
HCSR is used by the host controller not only for reflecting the current status of the host controller,
but also for receiving a command issued by the host controller driver. A write is for setting the
host controller driver. The host controller must guarantee that the bit to which 1 is written to is set
and the bit to which 0 is written to is unchanged. The host controller driver can distribute multiple
clear commands to the host controller by a previously issued command. The host controller driver
can read all bits normally.
The SOC0 and SOC1 bits indicate the number of the frame that has detected the
SchedulingOverrun error by the host controller. This occurs when the periodic list has not
completed before EOF. When the SchedulingOverrun error is detected, the host controller
increments the counter and sets the SO field in the HcInterruptStatus register.
Rev. 1.00, 02/04, page 516 of 804
Bit
31 to 18 —
17
16
15 to 4
3
HcCommandStatus Register (HCSR)
Bit Name
SOC1
SOC0
—
OCR
Initial
Value
All 0
0
0
All 0
0
R/W
R
R/W
R/W
R
R/W
Ownership Change Request
Reserved
These bits are always read as 0. The write value should
always be 0. The operation is not guaranteed if 1 is
written to these bits.
This bit is set by the OS host controller driver to request
the change of the control of the host controller. When this
bit is set, the host controller sets the OC bit in the
HcInterruptStatus register. After a change, this bit is
cleared and remains until the next request from the OS
host controller driver.
0: After a change, this bit is cleared and remains until the
1: Set the OC bit in the HcInterruptStatus register.
Description
Reserved
These bits are always read as 0. The write value should
always be 0. The operation is not guaranteed if 1 is
written to these bits.
Scheduling Overrun Count
These bits are incremented when each
SchedulingOverrun error occurs. These bits are initially
set to B'00 and returned to B'11. These bits are
incremented when a SchedulingOverrun error is detected
even though the SO bit in the HcInterruptStatus register is
set. These bits are used by the host controller driver to
monitor any continuous scheduling problem.
next request from the OS host controller driver.