HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 404

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

13.3
13.3.1
1. Transition to Sleep Mode
2. Canceling Sleep Mode
13.3.2
1. Transition to Software Standby Mode
Rev. 1.00, 02/04, page 366 of 804
Executing the SLEEP instruction when the STBY bit in STBCR is 0 causes a transition from
the program execution state to sleep mode. Although the CPU halts immediately after
executing the SLEEP instruction, the contents of its internal registers remain unchanged. The
on-chip peripheral modules continue to run in sleep mode and the clock continues to be output
to the CKIO pin.
Sleep mode is canceled by interrupts (NMI, IRQ, and on-chip peripheral module) or reset.
Interrupts are accepted in sleep mode even when the BL bit in the SR register is 1. If
necessary, save SPC and SSR to the stack before executing the SLEEP instruction.
 Canceling with an Interrupt
 Canceling with a Reset
The LSI switches from a program execution state to a software standby mode by executing the
SLEEP instruction when the STBY bit in STBCR register is 1. In software standby mode, not
only the CPU but also the clock and on-chip peripheral modules halt. The clock output state
from the CKIO pin can be selected by combining the CKOEN bit in the FRQCR register and
the HIZCNT bit in the CMNCR register.
The contents of the CPU and cache registers remain unchanged. Some registers of on-chip
peripheral modules are, however, initialized. Table 13.3 lists the states of on-chip peripheral
module registers in a software standby mode.
When an NMI, IRQ or on-chip peripheral module interrupt occurs, sleep mode is canceled
and interrupt exception handling is executed. A code indicating the interrupt source is set in
the INTEVT2 registers.
Sleep mode is canceled by a power-on reset or a manual reset.
Operation
Sleep Mode
Software Standby Mode