HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 489

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Bit
8
7
Bit Name
TSF
ER
Initial
Value R/W
0
0
R/(W)* Transmit Data Stop Flag
R/(W)* Receive Error
Description
Indicates that the number of transmit data matches the value
of SCTDSR.
0: Number of transmit data does not match the value of
[Clearing conditions]
•
•
1: Number of transmit data matches the value of SCTDSR
Indicates that a framing error or parity error occurred during
reception in asynchronous mode.*
0: No framing error or parity error occurred during reception
[Clearing conditions]
•
•
1: A framing error or parity error occurred during reception
[Setting conditions]
•
•
Notes: 1. The ER flag is not affected and retains its previous
SCTDSR
Power-on reset or manual reset
When 0 is written to TSF after reading TSF = 1
Power-on reset or manual reset
When 0 is written to ER after reading ER = 1
When the SCIF checks whether the stop bit at the end of
the receive data is 1 when reception ends, and the stop bit
is 0*
When, in reception, the number of 1-bits in the receive
data plus the parity bit does not match the parity setting
(even or odd) specified by the O/E bit in SCSMR
2. When the stop length is two bits, only the first stop
2
state when the RE bit in SCSCR is cleared to 0.
When a receive error occurs, the receive data is
still transferred to SCFRDR, and reception
continues.
The FER and PER bits in SCSSR can be used to
determine whether there is a receive error in the
data read from SCFRDR.
bit is checked for a value of 1; the second stop bit
is not checked.
Rev. 1.00, 02/04, page 451 of 804
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