HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 133

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Restrictions on Extended Repeat Loop Control:
1. Extended repeat control instruction assignment
2. Illegal instruction one or more instructions following the repeat end instruction
Note: A branch instruction without delay (BT, BF, TRAPA) can be placed as a repeat end
3. Repeat counter and repeat control
The LDRC instruction must be executed after executing the LDRS and LDRE instructions. In
addition, note that at least one instruction is required between the LDRC instruction and a
repeat start instruction.
If one of the following instructions is executed as a repeat end instruction, an illegal instruction
exception occurs.
 Delayed branch instructions
 Repeat control instructions
 Load instructions for SR, RS, and RE registers
The CPU always execute a program with comparing the repeat end register (RE) and the (PC –
4) (current instruction address). If the (PC – 4) [31:1] matches the RE [31:1] while bit 0 of RE
register is set to 1, the extended repeat control function is initiated.
 If RC ≥ 2, a control is passed to a repeat start instruction after a repeat end instruction has
 If RC == 1, the RC is decremented to 0 at the completion of the repeat end instruction and
 If RC == 0, the repeat control function is not initiated even if a repeat detection instruction
BRA, BSR, BT/S, BF/S, BSRF, RTS, BRAF, RTE, JSR, JMP
SETRC, LDRS, LDRE, LDRC
LCD Rn,SR, LDC @Rn+,SR, LDC Rn,RE, LDC @Rn+,RE, LDC Rn,RS, LDC @Rn+,RS
been executed. The RC is decremented by 1 at the completion of the repeat end instruction.
a control is passed to the subsequent instruction.
is executed. The repeat loop is executed once as normal instructions and a control is not be
passed to a repeat start instruction even if a repeat end instruction is executed.
instruction. A delay stop of a delayed branch instruction can also be placed as a repeat
end instruction. In this case, the RC[11:0] value is decremented by 1 regardless of branch
occurrence. If no branch occurs, a control returns to a repeat start instruction. If a branch
occurs, a control is passed to a branch destination.
Rev. 1.00, 02/04, page 95 of 804