HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 277

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HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Bit
10
9
8
7
6
5 to 2
1
0
Bit Name
W3
W2
W1
W0
WM
HW1
HW0
Initial
Value
1
0
1
0
0
All 0
0
0
R/W Description
R/W
R/W
R/W
R/W
R/W External Wait Mask Specification
R
R/W
R/W
Number of Access Wait Cycles
Specify the number of wait cycles to be inserted in the write
cycle and the first read cycle.
0000: 0 cycles
0001: 1 cycle
0010: 2 cycles
0011: 3 cycles
0100: 4 cycles
0101: 5 cycles
0110: 6 cycles
0111: 8 cycles
1000: 10 cycles
1001: 12 cycles
1010: 14 cycles
1011: 18 cycles
1100: 24 cycles
1101: Setting prohibited
1110: Setting prohibited
1111: Setting prohibited
Specifies whether or not the external wait input is valid. The
specification by this bit is valid even when the number of
access wait cycle is 0.
0: External wait input is valid
1: External wait input is ignored
Reserved
These bits are always read as 0. The write value should
always be 0. If 1 is written to these bits, correct operation
cannot be guaranteed.
Delay Cycles from RD, WEn negation to Address, CSn
negation
Specify the number of delay cycles from RD and WEn
negation to address and CSn negation.
00: 0.5 cycles
01: 1.5 cycles
10: 2.5 cycles
11: 3.5 cycles
Rev. 1.00, 02/04, page 239 of 804

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