HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 742

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HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Notes: 1. Controls accessing of the SDRAM mode register. XXX depends on the setting value.
Rev. 1.00, 02/04, page 704 of 804
Register Name
Break address mask register B
Break bus cycle register B
Branch source register
Break address register A
Break address mask register A
Break bus cycle register A
Branch destination register
Instruction register*
ID register
ID register
2. 8 bits when reading and 16 bits when writing.
3. If the SLEEP instruction is issued immediately after data is written to, the register value
4. The number of bits of each endpoint data register in USBF indicates the max value of
5. The endpoint stall register (EPSTL) must be accessed in 32 bits and the lower 2 bytes
6. 3-bit register when accessing from H-UDI interface.
may not be reflected correctly. Before executing the SLEEP instruction, read the
register.
FIFO buffer.
become valid.
6
Abbreviation
BAMRB
BBRB
BRSR
BARA
BAMRA
BBRA
BRDR
SDIR
SDID/SDIDH
SDID/SDIDL
Number
of Bits
32
16
32
32
32
16
32
16
16
16
Address
H'FFFF FFA4
H'FFFF FFA8
H'FFFF FFAC
H'FFFF FFB0
H'FFFF FFB4
H'FFFF FFB8
H'FFFF FFBC
H'A410 0200
H'A410 0214
H'A410 0216
Module
UBC
H-UDI
32
Access
Size
16
32
32
32
16
32
16
16
16

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