HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 325

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

9.5.7
Byte-Selection SRAM Interface
Basic Access Timing:
The byte-selection SRAM interface is a memory interface which outputs a byte-selection pin
(WE) in a read/write bus cycle. This interface has 16-bit data pins and accesses SRAMs having
upper and lower byte selection pins, such as UB and LB.
When the BAS bit of the CSnWCR register is cleared to 0 (initial value), the write access timing
of the byte-selection SRAM interface is the same as that for the normal space interface. While in
read access of a byte-selection SRAM interface, the byte-selection signal is output from the WEn
pin, which is different from that for the normal space interface. The basic access timing is shown
in figure 9.29. In write access, data is written to the memory according to the timing of the byte-
selection pin (WEn). For details, please refer to the Data Sheet for the corresponding memory.
If the BAS bit of the CSnWCR register is set to 1, the WEn pin and RD/WR pin timings change.
Figure 9.30 shows the basic access timing. In write access, data is written to the memory
according to the timing of the write enable pin (RD/WR). The data hold timing from RD/WR
negation to data write must be acquired by setting the HW[1:0] bits of the CSnWCR register.
Figure 9.31 shows an example of Connection with Byte-Selection SRAM.
Rev. 1.00, 02/04, page 287 of 804