HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 634

no-image

HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
EP2o has two 64-byte FIFOs, but the user can perform data reception and receive data reads
without being aware of this dual-FIFO configuration.
When one FIFO is full after reception is completed, the IFR0/EP2o FULL bit is set. After the first
receive operation into one of the FIFOs when both FIFOs are empty, the other FIFO is empty, and
so the next packet can be received immediately. When both FIFOs are full, NACK is returned to
the host automatically. When reading of the receive data is completed following data reception, 1
is written to the TRG/EP2o RDFN bit. This operation empties the FIFO that has just been read,
and makes it ready to receive the next packet.
Rev. 1.00, 02/04, page 596 of 804

Related parts for HD6417660