HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 443

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HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
15.3.12 Receive Data Assign Register (SIRDAR)
SIRDAR is a 16-bit readable/writable register that specifies the position of the receive data in a
frame (slot number).
Bit
7
6
5, 4
3
2
1
0
Bit
15
14 to 12
Bit Name
TDRE
TLREP
TDRA3
TDRA2
TDRA1
TDRA0
Bit Name
RDLE
Initial
Value
0
0
All 0
0
0
0
0
Initial
Value
0
All 0
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R
Description
Transmit Right-Channel Data Enable
0: Disables right-channel data transmission
1: Enables right-channel data transmission
Transmit Left-Channel Repeat
0: Transmits data specified in the SITDR bit in SITDR as
1: Repeatedly transmits data specified in the SITDL bit in
Reserved
These bits are always read as 0. The write value should
always be 0. If 1 is written to these bits, the operation is
not guaranteed.
Transmit Right-Channel Data Assign
Specify the position of right-channel data in a transmit
frame as B'0000 (0) to B'1110 (14).
1111: Setting prohibited
Description
Receive Left-Channel Data Enable
0: Disables left-channel data reception
1: Enables left-channel data reception
Reserved
These bits are always read as 0. The write value should
always be 0. If 1 is written to these bits, the operation is
not guaranteed.
right-channel data
SITDR as right-channel data
This bit setting is valid when the TDRE bit is set to 1.
When this bit is set to 1, the SITDR bit settings are
ignored.
Transmit data for the right channel is specified in the
SITDR bit in SITDR.
Rev. 1.00, 02/04, page 405 of 804

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