HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 355

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

When a transmit data empty transfer request of SCIF is set as the transfer request, the transfer
destination must be the SCIF’s transmit data register. Likewise, when the SCIF receive data full
transfer request is set as the transfer request, the transfer source must be the SCIF’s receive data
register. These conditions also apply to the SIOF and USBF.
Table 10.6 Selecting On-Chip Peripheral Module Request Modes with the RS3 to RS0 Bits
CHCR
RS[3:0]
1000
DMARS
MID
001000
001010
010101
011100
RID
01
10
01
10
01
10
11
00
DMA Transfer
Request
Source
SCIF0
transmitter
SCIF0
receiver
SCIF1
transmitter
SCIF1
receiver
SIOF
transmitter
SIOF receiver
USBF
transmitter 0
USBF
receiver 0
USBF
transmitter 1
USBF
receiver 1
DMA Transfer
Request Signal
TDFE(transmit data FIFO
empty interrupt)
RDF (receive data FIFO
full interrupt)
TDFE (transmit data FIFO
empty interrupt)
RDF (receive data FIFO
full interrupt)
TDFE (transmit data FIFO
empty interrupt)
RDF (receive data FIFO
full interrupt)
Transmit data empty
request 0
Receive data full
request 0
Transmit data empty
request 1
Receive data full
request 1
Source
Any
SCFRDR_0
Any
SCFRDR_1
Any
SIOF/SIRDR_0 Any
Any
EPDR2o, 6
Any
EPDR2o, 6
Rev. 1.00, 02/04, page 317 of 804
Destination
SCFTDR_0
Any
SCFTDR_1
Any
SIOF/SITDR_0 Cycle
EPDR2i, 5
Any
EPDR2i, 5
Any
Bus
Mode
Cycle
steal
Cycle
steal
Cycle
steal
Cycle
steal
steal
Cycle
steal
Cycle
steal
Cycle
steal
Cycle
steal
Cycle
steal