HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 294

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

9.5.3
Wait cycle insertion on a normal space access can be controlled by the settings of bits WR3 to
WR0 in CSnWCR. It is possible for area 4 to insert wait cycles independently in read access and
in write access. The areas other than 4 have common access wait for read cycle and write cycle.
The specified number of Tw cycles are inserted as wait cycles in a normal space access shown in
figure 9.8.
When the WM bit in CSnWCR is cleared to 0, the external wait input WAIT signal is also
sampled. WAIT pin sampling is shown in figure 9.9. A 2-cycle wait is specified as a software
wait. The WAIT signal is sampled on the falling edge of CKIO at the transition from the T1 or Tw
cycle to the T2 cycle.
Rev. 1.00, 02/04, page 256 of 804
Access Wait Control
Figure 9.8 Wait Timing for Normal Space Access (Software Wait Only)
Read
Write
Note: * The waveform for DACK is when active low is specified.
D15 to D0
D15 to D0
A23 to A0
RD/WR
DACK*
CKIO
WEn
CSn
RD
BS
T1
Tw
T2