HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 42

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Item
Bus state
controller (BSC)
Direct memory
access controller
(DMAC)
Clock pulse
generator (CPG)
Watchdog timer
(WDT)
Rev. 1.00, 02/04, page 4 of 804
Features
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Physical address space is divided into three areas: Area 0, area 3, area 4;
each a maximum of 16 Mbytes
The following features are settable for each area:
Bus size (8 or 16 bits); The supported bus size may differ for each area
Number of access wait cycles (Numbers of wait-state cycles during reading
and writing are independently selectable for some areas.)
Setting of idle wait cycles (for the same area or different area)
Specifying the memory to be connected to each area allows direct
connection to SRAM, SRAM with byte selection, SDRAM, or burst ROM
Outputs chip select signals (CS0, CS3, CS4) for corresponding area (Can be
turned by the program CSn assert/negate timing.)
SDRAM refresh function
Auto-refresh and self-refresh modes
SDRAM burst access function
Big endian or little endian can be set.
Four channels (for one channel, external requests can be accepted)
Burst mode and cycle-steal mode
Intermittent cycle-steal mode
Clocks can be input from an external pin (EXTAL or CKIO) or crystal unit
Three clocks generated:
Internal clock: 120 MHz
Bus clock: 60 MHz
Peripheral clock: 30 MHz
Supports power-down modes:
Software standby mode
Sleep mode
Module standby mode
Three clock modes (PLL1 and PLL2 multiplication ratio, clock, and crystal
unit can be selected)
One frequency-divider mode
One-channel watchdog timer
Watchdog timer mode and interval timer mode can be selected
In interval timer mode, interrupts can be generated