OM13008,598 NXP Semiconductors, OM13008,598 Datasheet - Page 15

• Manufacturer Part Number: OM13008,598
• Description: BOARD LPC XPRESSO LPC122X
• Manufacturer: NXP Semiconductors
• Series: LPCXpressor

Specifications of OM13008,598

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-6642; OM13008

NXP Semiconductors
UM10441
User manual
4.5.1 System memory remap register
Table 6.
Remark: The flash configuration block resides in its own memory area but is listed
together with the system control registers.
Table 7.
The system memory remap register selects whether the ARM interrupt vectors are read
from the boot ROM, the flash, or the SRAM.
Table 8.
Name
PDAWAKECFG
PDRUNCFG
-
DEVICE_ID
Name
FLASHCFG
Bit
1:0
31:2
Symbol
MAP
-
Register overview: system control block (base address 0x4004 8000)
Register overview: flash configuration (base address 0x5006 0000)
System memory remap register (SYSMEMREMAP, address 0x4004 8000) bit
description
All information provided in this document is subject to legal disclaimers.
Value
0x0
0x1
0x2
-
Access Address
R/W
R/W
-
R
Access Address
R/W
Rev. 1.1 — 10 March 2011
Description
System memory remap. Value 0x3 is reserved.
Boot Loader Mode. Interrupt vectors are re-mapped to Boot
ROM.
User RAM Mode. Interrupt vectors are re-mapped to Static
RAM.
User Flash Mode. Interrupt vectors are not re-mapped and
reside in Flash.
Reserved
offset
0x234
0x238
0x23C -
0x3F0
0x3F4
offset
0x028
Chapter 4: LPC122x System control (SYSCON)
Description
from Deep-sleep mode
Power-down configuration register
Reserved
Device ID
Description
Flash configuration register
Power-down states after wake-up
UM10441
© NXP B.V. 2011. All rights reserved.
Reset value
0x0000 FDF0
0x0000 FDF0
-
part
dependent
Reset value
0x0000 0000
…continued
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00
0x00
Reset
value