OM13008,598 NXP Semiconductors, OM13008,598 Datasheet - Page 55

• Manufacturer Part Number: OM13008,598
• Description: BOARD LPC XPRESSO LPC122X
• Manufacturer: NXP Semiconductors
• Series: LPCXpressor

Specifications of OM13008,598

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-6642; OM13008

5.1 How to read this chapter
5.2 Introduction
5.3 Register description
UM10441
User manual
5.3.1 Power control register
The PMU is identical on all LPC122x parts.
The PMU controls the Deep power-down mode. Four general purpose register in the PMU
can be used to retain data during Deep power-down mode. The PMU registers retain their
state during Deep-sleep and Deep power-down modes.
Table 55.
The power control register selects whether one of the ARM Cortex-M0 controlled
power-down modes (Sleep mode or Deep-sleep mode) or the Deep power-down mode is
entered and provides the flags for Sleep or Deep-sleep modes and Deep power-down
modes respectively. See
Table 56.
Name
PCON
GPREG0
GPREG1
GPREG2
GPREG3
SYSCFG
Bit
0
1
7:2
UM10441
Chapter 5: LPC122x Power Monitor Unit (PMU)
Rev. 1.1 — 10 March 2011
Symbol
-
DPDEN
-
Register overview: PMU (base address 0x4003 8000)
Power control register (PCON, address 0x4003 8000) bit description
All information provided in this document is subject to legal disclaimers.
Access
R/W
R/W
R/W
R/W
R/W
R/W
Value
-
0
1
-
Rev. 1.1 — 10 March 2011
Section 4.7
Description
Reserved. Do not write 1 to this bit.
Deep power-down mode enable
ARM WFI will enter Sleep or Deep-sleep mode (clock to
ARM Cortex-M0 core turned off).
ARM WFI will enter Deep-power down mode (ARM
Cortex-M0 core powered-down) if WDLOCKDP = 0 (see
Table 264 “Watchdog Mode register (MOD - 0x4000
4000) bit
Reserved. Do not write ones to this bit.
Address
offset
0x000
0x004
0x008
0x00C
0x010
0x014
for details on how to enter the power-down modes.
description”).
Description
Power control register
General purpose register 0
General purpose register 1
General purpose register 2
General purpose register 3
System configuration register (RTC clock
control and hysteresis of the WAKEUP pin).
© NXP B.V. 2011. All rights reserved.
User manual
Reset
value
0x0
0x0
0x0
0x0
0x0
0x0
55 of 442
0
0x0
Reset
value
0x0