OM13008,598 NXP Semiconductors, OM13008,598 Datasheet - Page 150

• Manufacturer Part Number: OM13008,598
• Description: BOARD LPC XPRESSO LPC122X
• Manufacturer: NXP Semiconductors
• Series: LPCXpressor

Specifications of OM13008,598

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-6642; OM13008

NXP Semiconductors
UM10441
User manual
9.5.12.2 Auto-baud modes
The ACR AutoRestart bit can be used to automatically restart baud-rate measurement if a
time-out occurs (the rate measurement counter overflows). If this bit is set the rate
measurement will restart at the next falling edge of the UART RX pin.
The auto-baud function can generate two interrupts.
The auto-baud interrupts have to be cleared by setting the corresponding ACR
ABTOIntClr and ABEOIntEn bits.
Typically the fractional baud-rate generator is disabled (DIVADDVAL = 0) during
auto-baud. However, if the fractional baud-rate generator is enabled (DIVADDVAL > 0), it
is going to impact the measuring of UART RX pin baud-rate, but the value of the FDR
register is not going to be modified after rate measurement. Also, when auto-baud is used,
any write to DLM and DLL registers should be done before ACR register write. The
minimum and the maximum baudrates supported by UART are function of UART_PCLK,
number of data bits, stop bits and parity bits.
When the software is expecting an ”AT" command, it configures the UART with the
expected character format and sets the ACR Start bit. The initial values in the divisor
latches DLM and DLM don‘t care. Because of the ”A" or ”a" ASCII coding (”A" = 0x41,
”a" = 0x61), the UART RX pin sensed start bit and the LSB of the expected character are
delimited by two falling edges. When the ACR Start bit is set, the auto-baud protocol will
execute the following phases:
1. On ACR Start bit setting, the baud-rate measurement counter is reset and the UART
2. A falling edge on UART RX pin triggers the beginning of the start bit. The rate
3. During the receipt of the start bit, 16 pulses are generated on the RSR baud input with
4. During the receipt of the start bit (and the character LSB for mode = 0) the rate
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ratemin
The IIR ABTOInt interrupt will get set if the interrupt is enabled (IER ABToIntEn is set
and the auto-baud rate measurement counter overflows).
The IIR ABEOInt interrupt will get set if the interrupt is enabled (IER ABEOIntEn is set
and the auto-baud has completed successfully).
RSR is reset. The RSR baud rate is switch to the highest rate.
measuring counter will start counting UART_PCLK cycles optionally pre-scaled by the
fractional baud-rate generator.
the frequency of the (fractional baud-rate pre-scaled) UART input clock, guaranteeing
the start bit is stored in the RSR.
counter will continue incrementing with the pre-scaled UART input clock
(UART_PCLK).
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2 P
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16 2 15
All information provided in this document is subject to legal disclaimers.
× CLK
×
Rev. 1.1 — 10 March 2011
≤
UART baudrate
Chapter 9: LPC122x UART0 with modem control
≤
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16
×
(
2
+
databits
PCLK
+
paritybits
+
stopbits
UM10441
© NXP B.V. 2011. All rights reserved.
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